2017-09-21 13:13:01 +02:00
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////////////////////////////////////////////////////////////////////////////////
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// Copyright 2017 eyck@minres.com
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2017-09-22 11:23:23 +02:00
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//
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2017-09-21 13:13:01 +02:00
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// Licensed under the Apache License, Version 2.0 (the "License"); you may not
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// use this file except in compliance with the License. You may obtain a copy
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// of the License at
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2017-09-22 11:23:23 +02:00
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//
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2017-09-21 13:13:01 +02:00
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// http://www.apache.org/licenses/LICENSE-2.0
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2017-09-22 11:23:23 +02:00
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//
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2017-09-21 13:13:01 +02:00
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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// License for the specific language governing permissions and limitations under
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// the License.
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////////////////////////////////////////////////////////////////////////////////
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/*
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* simplesystem.cpp
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*
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* Created on: 17.09.2017
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* Author: eyck@minres.com
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*/
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#include <sysc/SiFive/platform.h>
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namespace sysc {
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platform::platform(sc_core::sc_module_name nm)
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2017-09-26 17:10:10 +02:00
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: sc_core::sc_module(nm)
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, NAMED(i_master)
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, NAMED(i_router, 4, 1)
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, NAMED(i_uart)
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, NAMED(i_spi)
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, NAMED(i_gpio)
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, NAMED(i_plic)
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, NAMED(s_clk)
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, NAMED(s_rst) {
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i_master.initiator(i_router.target[0]);
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size_t i = 0;
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for (const auto &e : e300_plat_map) {
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i_router.initiator.at(i)(e.target->socket);
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i_router.add_target_range(i, e.start, e.size);
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i++;
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}
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i_uart.clk_i(s_clk);
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i_spi.clk_i(s_clk);
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i_gpio.clk_i(s_clk);
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i_plic.clk_i(s_clk);
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s_clk.write(10_ns);
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i_uart.rst_i(s_rst);
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i_spi.rst_i(s_rst);
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i_gpio.rst_i(s_rst);
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i_plic.rst_i(s_rst);
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i_master.rst_i(s_rst);
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SC_THREAD(gen_reset);
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}
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void platform::gen_reset() {
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s_rst = true;
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wait(10_ns);
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s_rst = false;
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2017-09-21 13:13:01 +02:00
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}
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} /* namespace sysc */
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