HIFIVE1-VP/riscv/gen_input/templates/src-CORENAME.cpp.gtl

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#include "util/ities.h"
#include <util/logging.h>

#include <elfio/elfio.hpp>
#include <iss/arch/${coreDef.name.toLowerCase()}.h>

#ifdef __cplusplus
extern "C" {
#endif
#include <ihex.h>
#ifdef __cplusplus
}
#endif
#include <fstream>
#include <cstdio>
#include <cstring>

using namespace iss::arch;

${coreDef.name.toLowerCase()}::${coreDef.name.toLowerCase()}() {
    reg.icount=0;
}

${coreDef.name.toLowerCase()}::~${coreDef.name.toLowerCase()}(){
}

void ${coreDef.name.toLowerCase()}::reset(uint64_t address) {
    for(size_t i=0; i<traits<${coreDef.name.toLowerCase()}>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<${coreDef.name.toLowerCase()}>::reg_t),0));
    reg.PC=address;
    reg.NEXT_PC=reg.PC;
    reg.trap_state=0;
    reg.machine_state=0x0;
}

uint8_t* ${coreDef.name.toLowerCase()}::get_regs_base_ptr(){
    return reinterpret_cast<uint8_t*>(&reg);
}

${coreDef.name.toLowerCase()}::phys_addr_t ${coreDef.name.toLowerCase()}::virt2phys(const iss::addr_t &pc) {
    return phys_addr_t(pc); // change logical address to physical address
}