2018-11-08 13:31:28 +01:00
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/*******************************************************************************
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* Copyright (C) 2017, 2018 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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#include "sysc/SiFive/fe310.h"
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namespace sysc {
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using namespace sc_core;
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using namespace SiFive;
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#ifdef HAS_VERILATOR
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inline std::unique_ptr<spi> create_spi(sc_module_name nm, bool use_rtl) {
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return use_rtl ? spi::create<spi_impl::rtl>("i_qspi1") : spi::create<spi_impl::beh>("i_qspi1");
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}
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#else
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inline std::unique_ptr<spi> create_spi(sc_module_name nm, bool use_rtl) {
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return spi::create<spi_impl::beh>("i_qspi1");
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}
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#endif
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fe310::fe310(sc_core::sc_module_name nm)
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: sc_core::sc_module(nm)
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, NAMED(pins_o, 32)
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, NAMED(pins_i, 32)
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, NAMED(erst_n)
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, NAMED(use_rtl, false)
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, NAMEDD(i_core_complex, core_complex)
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, NAMEDD(i_router, scc::router<>, e300_plat_t_map.size() + 2, 1)
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, NAMEDD(i_uart0, uart)
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, NAMEDD(i_uart1, uart)
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, NAMEDC(i_qspi0, spi, spi_impl::beh)
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, i_qspi1(create_spi("i_qspi1", use_rtl))
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, NAMEDC(i_qspi2, spi, spi_impl::beh)
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, NAMEDD(i_pwm0, pwm)
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, NAMEDD(i_pwm1, pwm)
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, NAMEDD(i_pwm2, pwm)
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, NAMEDD(i_gpio0, gpio)
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, NAMEDD(i_plic, plic)
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, NAMEDD(i_aon, aon)
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, NAMEDD(i_prci, prci)
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, NAMEDD(i_clint, clint)
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, NAMEDD(i_mem_qspi, mem_qspi_t)
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, NAMEDD(i_mem_ram, mem_ram_t)
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, NAMED(s_tlclk)
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, NAMED(s_lfclk)
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, NAMED(s_rst)
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, NAMED(s_mtime_int)
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, NAMED(s_msie_int)
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, NAMED(s_global_int, 256)
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, NAMED(s_local_int, 16)
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, NAMED(s_core_int)
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, NAMED(s_dummy_sck_i, 16)
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, NAMED(s_dummy_sck_o, 16) {
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i_core_complex->initiator(i_router->target[0]);
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size_t i = 0;
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for (const auto &e : e300_plat_t_map) {
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i_router->initiator.at(i)(e.target);
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2018-11-24 21:38:02 +01:00
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i_router->set_target_range(i, e.start, e.size);
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2018-11-08 13:31:28 +01:00
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i++;
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}
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i_router->initiator.at(i)(i_mem_qspi->target);
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2018-11-24 21:38:02 +01:00
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i_router->set_target_range(i, 0x20000000, 512_MB);
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2018-11-08 13:31:28 +01:00
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i_router->initiator.at(++i)(i_mem_ram->target);
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2018-11-24 21:38:02 +01:00
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i_router->set_target_range(i, 0x80000000, 128_kB);
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2018-11-08 13:31:28 +01:00
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i_uart0->clk_i(s_tlclk);
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i_uart1->clk_i(s_tlclk);
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i_qspi0->clk_i(s_tlclk);
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i_qspi1->clk_i(s_tlclk);
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i_qspi2->clk_i(s_tlclk);
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i_pwm0->clk_i(s_tlclk);
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i_pwm1->clk_i(s_tlclk);
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i_pwm2->clk_i(s_tlclk);
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i_gpio0->clk_i(s_tlclk);
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i_plic->clk_i(s_tlclk);
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i_aon->clk_i(s_tlclk);
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i_aon->lfclkc_o(s_lfclk);
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i_prci->hfclk_o(s_tlclk); // clock driver
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i_clint->tlclk_i(s_tlclk);
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i_clint->lfclk_i(s_lfclk);
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i_core_complex->clk_i(s_tlclk);
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i_uart0->rst_i(s_rst);
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i_uart1->rst_i(s_rst);
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i_qspi0->rst_i(s_rst);
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i_qspi1->rst_i(s_rst);
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i_qspi2->rst_i(s_rst);
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i_pwm0->rst_i(s_rst);
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i_pwm1->rst_i(s_rst);
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i_pwm2->rst_i(s_rst);
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i_gpio0->rst_i(s_rst);
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i_plic->rst_i(s_rst);
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i_aon->rst_o(s_rst);
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i_prci->rst_i(s_rst);
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i_clint->rst_i(s_rst);
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i_core_complex->rst_i(s_rst);
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i_aon->erst_n_i(erst_n);
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i_clint->mtime_int_o(s_mtime_int);
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i_clint->msip_int_o(s_msie_int);
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i_plic->global_interrupts_i(s_global_int);
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i_plic->core_interrupt_o(s_core_int);
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i_core_complex->sw_irq_i(s_msie_int);
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i_core_complex->timer_irq_i(s_mtime_int);
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i_core_complex->global_irq_i(s_core_int);
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i_core_complex->local_irq_i(s_local_int);
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pins_i(i_gpio0->pins_i);
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i_gpio0->pins_o(pins_o);
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i_gpio0->iof0_i[17](i_uart0->tx_o);
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i_uart0->rx_i(i_gpio0->iof0_o[16]);
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i_uart0->irq_o(s_global_int[3]);
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i_gpio0->iof0_i[5](i_qspi1->sck_o);
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i_gpio0->iof0_i[3](i_qspi1->mosi_o);
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i_qspi1->miso_i(i_gpio0->iof0_o[4]);
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i_gpio0->iof0_i[2](i_qspi1->scs_o[0]);
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i_gpio0->iof0_i[9](i_qspi1->scs_o[2]);
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i_gpio0->iof0_i[10](i_qspi1->scs_o[3]);
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i_qspi0->irq_o(s_global_int[5]);
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i_qspi1->irq_o(s_global_int[6]);
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i_qspi2->irq_o(s_global_int[7]);
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s_dummy_sck_i[0](i_uart1->tx_o);
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i_uart1->rx_i(s_dummy_sck_o[0]);
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i_uart1->irq_o(s_global_int[4]);
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i_gpio0->iof1_i[0](i_pwm0->cmpgpio_o[0]);
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i_gpio0->iof1_i[1](i_pwm0->cmpgpio_o[1]);
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i_gpio0->iof1_i[2](i_pwm0->cmpgpio_o[2]);
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i_gpio0->iof1_i[3](i_pwm0->cmpgpio_o[3]);
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i_gpio0->iof1_i[10](i_pwm2->cmpgpio_o[0]);
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i_gpio0->iof1_i[11](i_pwm2->cmpgpio_o[1]);
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i_gpio0->iof1_i[12](i_pwm2->cmpgpio_o[2]);
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i_gpio0->iof1_i[13](i_pwm2->cmpgpio_o[3]);
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i_gpio0->iof1_i[19](i_pwm1->cmpgpio_o[0]);
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i_gpio0->iof1_i[20](i_pwm1->cmpgpio_o[1]);
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i_gpio0->iof1_i[21](i_pwm1->cmpgpio_o[2]);
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i_gpio0->iof1_i[22](i_pwm1->cmpgpio_o[3]);
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i_pwm0->cmpip_o[0](s_global_int[40]);
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i_pwm0->cmpip_o[1](s_global_int[41]);
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i_pwm0->cmpip_o[2](s_global_int[42]);
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i_pwm0->cmpip_o[3](s_global_int[43]);
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i_pwm1->cmpip_o[0](s_global_int[44]);
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i_pwm1->cmpip_o[1](s_global_int[45]);
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i_pwm1->cmpip_o[2](s_global_int[46]);
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i_pwm1->cmpip_o[3](s_global_int[47]);
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i_pwm2->cmpip_o[0](s_global_int[48]);
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i_pwm2->cmpip_o[1](s_global_int[49]);
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i_pwm2->cmpip_o[2](s_global_int[50]);
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i_pwm2->cmpip_o[3](s_global_int[51]);
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for (auto &sock : s_dummy_sck_i) sock.error_if_no_callback = false;
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}
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} /* namespace sysc */
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