2018-11-08 13:31:28 +01:00
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/*******************************************************************************
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* Copyright (C) 2017, 2018 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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2017-09-21 13:13:01 +02:00
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#ifndef _PLIC_H_
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#define _PLIC_H_
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2017-10-04 23:15:04 +02:00
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#include <scc/register.h>
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#include <scc/tlm_target.h>
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2017-09-21 13:13:01 +02:00
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namespace sysc {
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class plic_regs;
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2017-10-04 14:30:25 +02:00
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class plic : public sc_core::sc_module, public scc::tlm_target<> {
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2017-09-21 13:13:01 +02:00
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public:
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2018-11-08 13:31:28 +01:00
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SC_HAS_PROCESS(plic);// NOLINT
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2017-09-21 13:13:01 +02:00
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sc_core::sc_in<sc_core::sc_time> clk_i;
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2017-09-22 11:23:23 +02:00
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sc_core::sc_in<bool> rst_i;
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2017-10-04 23:15:04 +02:00
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sc_core::sc_vector<sc_core::sc_in<bool>> global_interrupts_i;
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sc_core::sc_out<bool> core_interrupt_o;
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sc_core::sc_event raise_int_ev;
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sc_core::sc_event clear_int_ev;
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2017-09-21 13:13:01 +02:00
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plic(sc_core::sc_module_name nm);
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2017-10-04 23:15:04 +02:00
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~plic() override;
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2017-09-22 11:23:23 +02:00
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2017-09-21 13:13:01 +02:00
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protected:
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void clock_cb();
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void reset_cb();
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2017-10-04 23:15:04 +02:00
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void global_int_port_cb();
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void handle_pending_int();
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void reset_pending_int(uint32_t irq);
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void raise_core_interrupt();
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void clear_core_interrupt();
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2017-09-21 13:13:01 +02:00
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sc_core::sc_time clk;
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std::unique_ptr<plic_regs> regs;
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2017-10-04 23:15:04 +02:00
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std::function<bool(scc::sc_register<uint32_t>, uint32_t)> m_claim_complete_write_cb;
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2017-09-21 13:13:01 +02:00
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};
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} /* namespace sysc */
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#endif /* _PLIC_H_ */
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