HIFIVE1-VP/platform/gen_input/clint.rdl

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2017-10-04 10:31:11 +02:00
regfile clint_regs {
reg {
name = "msip";
desc = "Hart 0 software interrupt register";
field {
name="msip";
} msip[0:0];
} msip @0;
reg {
name = "mtimecmp";
desc = "Hart 0 time comparator register";
regwidth=64;
field {
name="data";
fieldwidth=64;
} data = 64'h7FFFFFFFFFFFFFFF;
} mtimecmp @0x4000;
reg {
name = "mtime";
desc = "Timer register";
regwidth=64;
field {
fieldwidth=64;
name="data";
} data[63:0];
} mtime @0xBFF8;
};