2021-01-04 20:54:53 +01:00
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#
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# Copyright (c) 2019 -2021 MINRES Technolgies GmbH
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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2018-12-31 15:23:37 +01:00
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import cppyy
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cppyy.add_include_path('.')
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cppyy.load_library('../lib/libsystemc.so.2.3.3')
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cppyy.include('cppyy_systemc.h')
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cppyy.include('sysc/kernel/sc_module.h')
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import pdb
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from cppyy.gbl import sc_core
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from pprint import pprint as pp
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#pprint(dir(cppyy.gbl.sc_dt))
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cppyy.cppdef("""
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class my_module: public sc_core::sc_module {
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public:
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sc_core::sc_signal<sc_dt::sc_uint<32>> sig;
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sc_core::sc_out<sc_dt::sc_uint<32>> port;
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my_module():sc_core::sc_module("module"), sig("sig"){}
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};
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void bind_port(sc_core::sc_signal<sc_dt::sc_uint<32>>& s, sc_core::sc_out<sc_dt::sc_uint<32>>& p){p(s);}
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""")
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v=cppyy.gbl.std.vector[int](10)
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#n = sc_module()
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n = cppyy.gbl.my_module()
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pp(sc_core.sc_time_stamp().to_string())
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pp(n.simcontext().time_stamp().to_string())
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2020-10-08 17:43:16 +02:00
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print(type(n.port).__name__ +", "+type(n.port).__cpp_name__)
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print(type(n.sig).__name__+", "+type(n.sig).__cpp_name__)
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2018-12-31 15:23:37 +01:00
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#try:
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# cppyy.cppdef("""blah /* a comment */""");
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#except:
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# print("No success")
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pdb.set_trace()
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