mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 23:41:23 +01:00

When OpenSBI is compiled as fPIE mode, the assembler will translate "la" to GOT reference pattern. It will cause to cost an additional load instruction when obtaining the symbol address. However, if the symbol locates within the positive or negative 2GB region, we can use "lla" instead of "la" to avoid unneeded GOT references. This patch assumes that the OpenSBI image excluding the payload does not exceed 2GB. Based on this assumption, all "la" instructions are replaced by "lla" to avoid performance degradation when compiling as fPIE mode. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
98 lines
1.9 KiB
ArmAsm
98 lines
1.9 KiB
ArmAsm
/*
|
|
* SPDX-License-Identifier: BSD-2-Clause
|
|
*
|
|
* Copyright (c) 2019 Western Digital Corporation or its affiliates.
|
|
*
|
|
* Authors:
|
|
* Anup Patel <anup.patel@wdc.com>
|
|
*/
|
|
|
|
#include "fw_base.S"
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_boot_hart
|
|
/*
|
|
* This function is called very early even before
|
|
* fw_save_info() is called.
|
|
* We can only use a0, a1, and a2 registers here.
|
|
* The boot HART id should be returned in 'a0'.
|
|
*/
|
|
fw_boot_hart:
|
|
li a0, -1
|
|
ret
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_save_info
|
|
/*
|
|
* We can only use a0, a1, a2, a3, and a4 registers here.
|
|
* The a0, a1, and a2 registers will be same as passed by
|
|
* previous booting stage.
|
|
* Nothing to be returned here.
|
|
*/
|
|
fw_save_info:
|
|
ret
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_next_arg1
|
|
/*
|
|
* We can only use a0, a1, and a2 registers here.
|
|
* The a0, a1, and a2 registers will be same as passed by
|
|
* previous booting stage.
|
|
* The next arg1 should be returned in 'a0'.
|
|
*/
|
|
fw_next_arg1:
|
|
#ifdef FW_PAYLOAD_FDT_ADDR
|
|
li a0, FW_PAYLOAD_FDT_ADDR
|
|
#else
|
|
add a0, a1, zero
|
|
#endif
|
|
ret
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_next_addr
|
|
/*
|
|
* We can only use a0, a1, and a2 registers here.
|
|
* The next address should be returned in 'a0'.
|
|
*/
|
|
fw_next_addr:
|
|
lla a0, payload_bin
|
|
ret
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_next_mode
|
|
/*
|
|
* We can only use a0, a1, and a2 registers here.
|
|
* The next address should be returned in 'a0'.
|
|
*/
|
|
fw_next_mode:
|
|
li a0, PRV_S
|
|
ret
|
|
|
|
.section .entry, "ax", %progbits
|
|
.align 3
|
|
.global fw_options
|
|
/*
|
|
* We can only use a0, a1, and a2 registers here.
|
|
* The 'a4' register will have default options.
|
|
* The next address should be returned in 'a0'.
|
|
*/
|
|
fw_options:
|
|
add a0, zero, zero
|
|
ret
|
|
|
|
.section .payload, "ax", %progbits
|
|
.align 4
|
|
.globl payload_bin
|
|
payload_bin:
|
|
#ifndef FW_PAYLOAD_PATH
|
|
wfi
|
|
j payload_bin
|
|
#else
|
|
.incbin FW_PAYLOAD_PATH
|
|
#endif
|