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ef9f02e7fb
Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.
dts example (Quad-core AX45MP):
cpus {
...
timebase-frequency = <0x3938700>;
...
}
soc {
...
plmt0@e6000000 {
compatible = "andestech,plmt0";
reg = <0x00 0xe6000000 0x00 0x100000>;
interrupts-extended = <&cpu0_intc 0x07
&cpu1_intc 0x07
&cpu2_intc 0x07
&cpu3_intc 0x07>;
};
...
}
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
30 lines
518 B
Plaintext
30 lines
518 B
Plaintext
# SPDX-License-Identifier: BSD-2-Clause
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config PLATFORM_ANDES_AE350
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bool
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select FDT
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select IRQCHIP_PLIC
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select FDT_SERIAL
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select FDT_SERIAL_UART8250
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select FDT_TIMER
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select FDT_TIMER_PLMT
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default y
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if PLATFORM_ANDES_AE350
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config PLATFORM_ANDES_AE350_NAME
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string "Platform default name"
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default "Andes AE350"
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config PLATFORM_ANDES_AE350_MAJOR_VER
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int "Platform major version"
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range 0 65535
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default 0
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config PLATFORM_ANDES_AE350_MINOR_VER
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int "Platform minor version"
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range 0 65535
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default 1
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endif
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