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b5ae8e8a65
We generally don't get misaligned load/store traps from Linux/U-Boot compiled using GCC 8.2 or higher but this is not true with older GCC toolchains. To tackle this we add misaligned load/store trap handling adopted from BBL sources but much more simpler. (Note: BBL sources can be found at https://github.com/riscv/riscv-pk.git) Signed-off-by: Anup Patel <anup.patel@wdc.com>
27 lines
573 B
C
27 lines
573 B
C
/*
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* Copyright (c) 2018 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#ifndef __SBI_MISALIGNED_LDST_H__
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#define __SBI_MISALIGNED_LDST_H__
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#include <sbi/sbi_types.h>
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struct sbi_trap_regs;
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struct sbi_scratch;
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int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
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struct sbi_trap_regs *regs,
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struct sbi_scratch *scratch);
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int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
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struct sbi_trap_regs *regs,
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struct sbi_scratch *scratch);
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#endif
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