Radim Krčmář dac15cb910 lib: sbi_hart: reset mstateen0 ...

The current logic clears some bits based on SBI known extensions.
Be safe and do not leave enabled anything that SBI doesn't control.

This is not a breaking change, because the register must be initialized
to 0 by the ISA on reset, but it is better to not depend on it when we
don't need to.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250429142549.3673976-8-rkrcmar@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>

2025-04-30 10:14:26 +05:30

..

sbi

lib: sbi_hart: reset mstateen0

2025-04-30 10:14:26 +05:30

utils

lib: sbi: Set the scratch allocation to alignment to cacheline size

2025-04-24 09:23:47 +05:30