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This is achieved by removing the 'no-map' property from the 'reserved-memory' node when PMP is present, otherwise we keep it as it offers a small protection if the OS does not map this region at all. A new callback in platform_override is introduced and allows to fixup the device-tree. It is used here to override this new default behaviour on SiFive Fu540 platforms that has an erratum that prevents S-mode software to access a PMP protected region using 1GB page table mapping. If PMP is present, telling the OS not to map the reserved regions does not add much protection since it only avoids access to regions that are already protected by PMP. But by not allowing the OS to map those regions, it creates holes in the OS system memory map and prevents the use of hugepages which would generate, among other benefits, less TLB miss. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
190 lines
4.1 KiB
C
190 lines
4.1 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Atish Patra <atish.patra@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_io.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/sifive-uart.h>
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#include <sbi_utils/sys/clint.h>
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/* clang-format off */
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#define FU540_HART_COUNT 5
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#define FU540_SYS_CLK 1000000000
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#define FU540_CLINT_ADDR 0x2000000
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#define FU540_PLIC_ADDR 0xc000000
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#define FU540_PLIC_NUM_SOURCES 0x35
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#define FU540_PLIC_NUM_PRIORITIES 7
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#define FU540_UART0_ADDR 0x10010000
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#define FU540_UART1_ADDR 0x10011000
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#define FU540_UART_BAUDRATE 115200
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/* PRCI clock related macros */
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//TODO: Do we need a separate driver for this ?
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#define FU540_PRCI_BASE_ADDR 0x10000000
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#define FU540_PRCI_CLKMUXSTATUSREG 0x002C
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#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1)
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/* Full tlb flush always */
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#define FU540_TLB_RANGE_FLUSH_LIMIT 0
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/* clang-format on */
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static struct plic_data plic = {
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.addr = FU540_PLIC_ADDR,
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.num_src = FU540_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = FU540_CLINT_ADDR,
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.first_hartid = 0,
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.hart_count = FU540_HART_COUNT,
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.has_64bit_mmio = TRUE,
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};
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static void fu540_modify_dt(void *fdt)
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{
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fdt_cpu_fixup(fdt);
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fdt_fixups(fdt);
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/*
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* SiFive Freedom U540 has an erratum that prevents S-mode software
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* to access a PMP protected region using 1GB page table mapping, so
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* always add the no-map attribute on this platform.
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*/
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fdt_reserved_memory_nomap_fixup(fdt);
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}
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static int fu540_final_init(bool cold_boot)
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{
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void *fdt;
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if (!cold_boot)
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return 0;
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fdt = sbi_scratch_thishart_arg1_ptr();
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fu540_modify_dt(fdt);
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return 0;
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}
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static int fu540_console_init(void)
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{
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unsigned long peri_in_freq;
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if (readl((volatile void *)FU540_PRCI_BASE_ADDR +
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FU540_PRCI_CLKMUXSTATUSREG) &
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FU540_PRCI_CLKMUX_STATUS_TLCLKSEL) {
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peri_in_freq = FU540_SYS_CLK;
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} else {
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peri_in_freq = FU540_SYS_CLK / 2;
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}
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return sifive_uart_init(FU540_UART0_ADDR, peri_in_freq,
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FU540_UART_BAUDRATE);
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}
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static int fu540_irqchip_init(bool cold_boot)
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{
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int rc;
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u32 hartid = current_hartid();
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if (cold_boot) {
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rc = plic_cold_irqchip_init(&plic);
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if (rc)
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return rc;
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}
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return plic_warm_irqchip_init(&plic, (hartid) ? (2 * hartid - 1) : 0,
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(hartid) ? (2 * hartid) : -1);
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}
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static int fu540_ipi_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = clint_cold_ipi_init(&clint);
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if (rc)
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return rc;
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}
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return clint_warm_ipi_init();
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}
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static u64 fu540_get_tlbr_flush_limit(void)
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{
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return FU540_TLB_RANGE_FLUSH_LIMIT;
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}
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static int fu540_timer_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = clint_cold_timer_init(&clint, NULL);
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if (rc)
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return rc;
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}
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return clint_warm_timer_init();
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}
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static u32 fu540_hart_index2id[FU540_HART_COUNT - 1] = {
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[0] = 1,
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[1] = 2,
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[2] = 3,
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[3] = 4,
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};
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static int fu540_system_reset(u32 type)
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{
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/* For now nothing to do. */
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return 0;
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}
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const struct sbi_platform_operations platform_ops = {
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.final_init = fu540_final_init,
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.console_putc = sifive_uart_putc,
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.console_getc = sifive_uart_getc,
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.console_init = fu540_console_init,
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.irqchip_init = fu540_irqchip_init,
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.ipi_send = clint_ipi_send,
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.ipi_clear = clint_ipi_clear,
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.ipi_init = fu540_ipi_init,
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.get_tlbr_flush_limit = fu540_get_tlbr_flush_limit,
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.timer_value = clint_timer_value,
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.timer_event_stop = clint_timer_event_stop,
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.timer_event_start = clint_timer_event_start,
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.timer_init = fu540_timer_init,
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.system_reset = fu540_system_reset
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
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.name = "SiFive Freedom U540",
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.features = SBI_PLATFORM_DEFAULT_FEATURES,
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.hart_count = (FU540_HART_COUNT - 1),
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.hart_index2id = fu540_hart_index2id,
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.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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