mirror of
https://github.com/riscv-software-src/opensbi.git
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aa0ed1d733
We just need to distinguish only between FENCE and non FENCE related IPIs as all of the fence related requests are handled via fifo now. Remove the unnecessary IPI types related to individual fence types. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
154 lines
3.4 KiB
C
154 lines
3.4 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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* Nick Kossifidis <mick@ics.forth.gr>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_barrier.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_tlb.h>
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#include <sbi/sbi_trap.h>
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#include <sbi/sbi_unpriv.h>
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static unsigned long ipi_data_off;
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static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event,
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void *data)
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{
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int ret;
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struct sbi_scratch *remote_scratch = NULL;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_ipi_data *ipi_data;
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if (sbi_platform_hart_disabled(plat, hartid))
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return -1;
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/*
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* Set IPI type on remote hart's scratch area and
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* trigger the interrupt
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*/
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remote_scratch = sbi_hart_id_to_scratch(scratch, hartid);
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ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
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if (event == SBI_IPI_EVENT_FENCE) {
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ret = sbi_tlb_fifo_update(remote_scratch, hartid, data);
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if (ret < 0)
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return ret;
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}
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atomic_raw_set_bit(event, &ipi_data->ipi_type);
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smp_wmb();
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sbi_platform_ipi_send(plat, hartid);
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if (event == SBI_IPI_EVENT_FENCE)
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sbi_tlb_fifo_sync(scratch);
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return 0;
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}
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int sbi_ipi_send_many(struct sbi_scratch *scratch,
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struct sbi_trap_info *uptrap,
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ulong *pmask, u32 event, void *data)
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{
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ulong i, m;
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ulong mask = sbi_hart_available_mask();
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u32 hartid = sbi_current_hartid();
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if (pmask) {
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mask &= sbi_load_ulong(pmask, scratch, uptrap);
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if (uptrap->cause)
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return SBI_ETRAP;
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}
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/* Send IPIs to every other hart on the set */
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for (i = 0, m = mask; m; i++, m >>= 1)
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if ((m & 1UL) && (i != hartid))
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sbi_ipi_send(scratch, i, event, data);
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/*
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* If the current hart is on the set, send an IPI
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* to it as well
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*/
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if (mask & (1UL << hartid))
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sbi_ipi_send(scratch, hartid, event, data);
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return 0;
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}
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void sbi_ipi_clear_smode(struct sbi_scratch *scratch)
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{
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csr_clear(CSR_MIP, MIP_SSIP);
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}
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void sbi_ipi_process(struct sbi_scratch *scratch)
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{
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unsigned long ipi_type;
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unsigned int ipi_event;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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struct sbi_ipi_data *ipi_data =
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sbi_scratch_offset_ptr(scratch, ipi_data_off);
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u32 hartid = sbi_current_hartid();
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sbi_platform_ipi_clear(plat, hartid);
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ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
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ipi_event = 0;
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while (ipi_type) {
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if (!(ipi_type & 1UL))
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goto skip;
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switch (ipi_event) {
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case SBI_IPI_EVENT_SOFT:
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csr_set(CSR_MIP, MIP_SSIP);
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break;
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case SBI_IPI_EVENT_FENCE:
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sbi_tlb_fifo_process(scratch);
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break;
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case SBI_IPI_EVENT_HALT:
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sbi_hart_hang();
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break;
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default:
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break;
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};
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skip:
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ipi_type = ipi_type >> 1;
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ipi_event++;
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};
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}
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int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
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{
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int ret;
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struct sbi_ipi_data *ipi_data;
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if (cold_boot) {
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ipi_data_off = sbi_scratch_alloc_offset(sizeof(*ipi_data),
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"IPI_DATA");
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if (!ipi_data_off)
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return SBI_ENOMEM;
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} else {
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if (!ipi_data_off)
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return SBI_ENOMEM;
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}
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ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
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ipi_data->ipi_type = 0x00;
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ret = sbi_tlb_fifo_init(scratch, cold_boot);
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if (ret)
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return ret;
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/* Enable software interrupts */
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csr_set(CSR_MIE, MIP_MSIP);
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return sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
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}
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