mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 15:31:22 +01:00

The PXA variant of the uart8250 adds the UART Unit Enable bit (UUE) that needs to be set to enable the XScale PXA UART. And it is required for some RISC-V SoCs like the Spacemit K1 that implement the PXA UART. This introduces the "intel,xscale-uart" compatible to handle setting the UUE bit. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250327-pxa-uart-support-v2-1-c4400c1fcd0b@pigmoral.tech Signed-off-by: Anup Patel <anup@brainfault.org>
43 lines
1.0 KiB
C
43 lines
1.0 KiB
C
/*
|
|
* SPDX-License-Identifier: BSD-2-Clause
|
|
*
|
|
* Copyright (c) 2020 Western Digital Corporation or its affiliates.
|
|
*
|
|
* Authors:
|
|
* Anup Patel <anup.patel@wdc.com>
|
|
*/
|
|
|
|
#include <sbi_utils/fdt/fdt_helper.h>
|
|
#include <sbi_utils/serial/fdt_serial.h>
|
|
#include <sbi_utils/serial/uart8250.h>
|
|
|
|
static int serial_uart8250_init(const void *fdt, int nodeoff,
|
|
const struct fdt_match *match)
|
|
{
|
|
struct platform_uart_data uart = { 0 };
|
|
ulong caps = (ulong)match->data;
|
|
int rc;
|
|
|
|
rc = fdt_parse_uart_node(fdt, nodeoff, &uart);
|
|
if (rc)
|
|
return rc;
|
|
|
|
return uart8250_init(uart.addr, uart.freq, uart.baud,
|
|
uart.reg_shift, uart.reg_io_width,
|
|
uart.reg_offset, caps);
|
|
}
|
|
|
|
static const struct fdt_match serial_uart8250_match[] = {
|
|
{ .compatible = "ns16550" },
|
|
{ .compatible = "ns16550a" },
|
|
{ .compatible = "snps,dw-apb-uart" },
|
|
{ .compatible = "intel,xscale-uart",
|
|
.data = (void *)UART_CAP_UUE },
|
|
{ },
|
|
};
|
|
|
|
const struct fdt_driver fdt_serial_uart8250 = {
|
|
.match_table = serial_uart8250_match,
|
|
.init = serial_uart8250_init,
|
|
};
|