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https://github.com/riscv-software-src/opensbi.git
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8c362e7d06
This simplifies both the callers and the callees by removing duplicated
code and consolidating the error handling. It also fixes two bugs in the
process:
1) ie_words was one too large when plic->num_src was a multiple of 32.
2) plic_set_ie takes a 32-bit mask, not a Boolean value, so the FPGA
platforms previously only enabled one out of every 32 interrupts.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
29 lines
591 B
C
29 lines
591 B
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __IRQCHIP_PLIC_H__
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#define __IRQCHIP_PLIC_H__
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#include <sbi/sbi_types.h>
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struct plic_data {
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unsigned long addr;
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unsigned long num_src;
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};
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int plic_context_init(const struct plic_data *plic, int context_id,
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bool enable, u32 threshold);
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int plic_warm_irqchip_init(const struct plic_data *plic,
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int m_cntx_id, int s_cntx_id);
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int plic_cold_irqchip_init(const struct plic_data *plic);
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#endif
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