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8a4088c3af
Currently, we aggresively use atomic operation on CLINT IPI register. This patch simplify CLINT IPI APIs by reducing use of atomic operations. In future, we will gradually increase use of atomic operations for CLINT IPI APIs. Signed-off-by: Anup Patel <anup.patel@wdc.com>
132 lines
2.7 KiB
C
132 lines
2.7 KiB
C
/*
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* Copyright (c) 2018 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <sbi/riscv_io.h>
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#include <sbi/riscv_atomic.h>
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#include <plat/sys/clint.h>
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static u32 clint_ipi_hart_count;
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static volatile void *clint_ipi_base;
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static volatile u32 *clint_ipi;
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void clint_ipi_inject(u32 target_hart, u32 source_hart)
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{
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if ((clint_ipi_hart_count <= target_hart) ||
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(clint_ipi_hart_count <= source_hart))
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return;
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/* Set CLINT IPI */
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writel(1, &clint_ipi[target_hart]);
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}
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void clint_ipi_sync(u32 target_hart, u32 source_hart)
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{
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u32 target_ipi, incoming_ipi;
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if ((clint_ipi_hart_count <= target_hart) ||
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(clint_ipi_hart_count <= source_hart))
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return;
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/* Wait until target HART has handled IPI */
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incoming_ipi = 0;
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while (1) {
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target_ipi = readl(&clint_ipi[target_hart]);
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if (!target_ipi)
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break;
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incoming_ipi |=
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atomic_raw_xchg_uint(&clint_ipi[source_hart], 0);
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}
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if (incoming_ipi)
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writel(incoming_ipi, &clint_ipi[source_hart]);
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}
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void clint_ipi_clear(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Clear CLINT IPI */
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writel(0, &clint_ipi[target_hart]);
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}
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int clint_warm_ipi_init(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart ||
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!clint_ipi_base)
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return -1;
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/* Clear CLINT IPI */
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clint_ipi_clear(target_hart);
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return 0;
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}
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int clint_cold_ipi_init(unsigned long base, u32 hart_count)
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{
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/* Figure-out CLINT IPI register address */
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clint_ipi_hart_count = hart_count;
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clint_ipi_base = (void *)base;
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clint_ipi = (u32 *)clint_ipi_base;
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return 0;
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}
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static u32 clint_time_hart_count;
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static volatile void *clint_time_base;
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static volatile u64 *clint_time_val;
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static volatile u64 *clint_time_cmp;
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u64 clint_timer_value(void)
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{
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return readq_relaxed(clint_time_val);
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}
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void clint_timer_event_stop(u32 target_hart)
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{
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if (clint_time_hart_count <= target_hart)
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return;
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/* Clear CLINT Time Compare */
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writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
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}
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void clint_timer_event_start(u32 target_hart, u64 next_event)
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{
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if (clint_time_hart_count <= target_hart)
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return;
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/* Program CLINT Time Compare */
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writeq_relaxed(next_event, &clint_time_cmp[target_hart]);
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}
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int clint_warm_timer_init(u32 target_hart)
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{
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if (clint_time_hart_count <= target_hart ||
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!clint_time_base)
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return -1;
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/* Clear CLINT Time Compare */
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writeq_relaxed(-1ULL, &clint_time_cmp[target_hart]);
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return 0;
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}
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int clint_cold_timer_init(unsigned long base, u32 hart_count)
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{
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/* Figure-out CLINT Time register address */
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clint_time_hart_count = hart_count;
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clint_time_base = (void *)base;
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clint_time_val = (u64 *)(clint_time_base + 0xbff8);
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clint_time_cmp = (u64 *)(clint_time_base + 0x4000);
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return 0;
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}
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