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https://github.com/riscv-software-src/opensbi.git
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7a13beb213
It has been reported that link address range of previous booting stage (such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC. This means self-relocation in FW_DYNAMIC can potentially corrupt previous booting stage if any of the secondary HART enter FW_DYNAMIC before primary HART. To tackle this, we add preferred boot HART field (i.e boot_hart) in struct fw_dyanmic_info. We use this field to force secondary HARTs into relocation wait loop till preferred/primary boot HART enters FW_DYNAMIC completes self-relocation. If preferred boot HART is not available then we fall back to relocation lottery approach. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
129 lines
2.4 KiB
ArmAsm
129 lines
2.4 KiB
ArmAsm
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include "fw_base.S"
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.align 3
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.section .entry, "ax", %progbits
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.global fw_boot_hart
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/*
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* This function is called very early even before
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* fw_save_info() is called.
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* We can only use a0, a1, and a2 registers here.
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* The boot HART id should be returned in 'a0'.
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*/
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fw_boot_hart:
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li a0, -1
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_save_info
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/*
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* We can only use a0, a1, a2, a3, and a4 registers here.
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* The a0, a1, and a2 registers will be same as passed by
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* previous booting stage.
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* Nothing to be returned here.
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*/
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fw_save_info:
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_prev_arg1
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/*
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* We can only use a0, a1, and a2 registers here.
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* The previous arg1 should be returned in 'a0'.
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*/
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fw_prev_arg1:
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#ifdef FW_PAYLOAD_FDT_PATH
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la a0, fdt_bin
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#else
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add a0, zero, zero
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#endif
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_next_arg1
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/*
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* We can only use a0, a1, and a2 registers here.
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* The next arg1 should be returned in 'a0'.
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*/
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fw_next_arg1:
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#ifdef FW_PAYLOAD_FDT_ADDR
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li a0, FW_PAYLOAD_FDT_ADDR
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#else
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add a0, zero, zero
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#endif
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_next_addr
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/*
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* We can only use a0, a1, and a2 registers here.
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* The next address should be returned in 'a0'.
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*/
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fw_next_addr:
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la a0, payload_bin
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_next_mode
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/*
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* We can only use a0, a1, and a2 registers here.
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* The next address should be returned in 'a0'.
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*/
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fw_next_mode:
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li a0, PRV_S
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ret
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.align 3
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.section .entry, "ax", %progbits
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.global fw_options
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/*
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* We can only use a0, a1, and a2 registers here.
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* The 'a4' register will have default options.
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* The next address should be returned in 'a0'.
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*/
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fw_options:
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add a0, zero, zero
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ret
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/*
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* We disable relaxation because use of ".align"
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* and ".balign" can potentially generate compile
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* errors with latest RISC-V GCC Binutils.
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*/
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.option push
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.option norelax
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#ifdef FW_PAYLOAD_FDT_PATH
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.align 4
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.section .text, "ax", %progbits
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.globl fdt_bin
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fdt_bin:
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.incbin FW_PAYLOAD_FDT_PATH
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#endif
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.align 4
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.section .payload, "ax", %progbits
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.globl payload_bin
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payload_bin:
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#ifndef FW_PAYLOAD_PATH
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wfi
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j payload_bin
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#else
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.incbin FW_PAYLOAD_PATH
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#endif
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.option pop
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