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https://github.com/riscv-software-src/opensbi.git
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Pawandeep OzaandAnup Patel
759910326c
Add parent_unique_id fields to struct aplic_data for IMSIC parent linking in MSI mode. Store parent IMSIC unique_id during FDT parsing of the APLIC node. Add aplic_is_msi_mode() complementing aplic_is_direct_mode() to consolidate delivery mode detection. Add APLIC_TARGET_EIID() macro for packing the EIID field into the TARGET register. Add parent_unique_id and parent_irq_map fields to struct aplic_data. parent_unique_id identifies the upstream IMSIC irqchip device resolved via sbi_irqchip_find_device() during hwirq_setup. parent_irq_map is a per-source array allocated at cold init time to track the EIID assigned by the IMSIC for each APLIC source. Restore aplic_writel_msicfg() and re-introduce MSI address register programming in aplic_init(), gated on aplic_is_msi_mode(). Set the DOMAINCFG_DM bit to switch the hardware to MSI delivery mode when no IDC structures are present. Add aplic_program_msi_target() to pack hart_index, guest_index, and EIID into the APLIC_TARGET register. Add aplic_write_msi() as the sbi_irqchip write_msi callback that extracts EIID and hart_index from the MSI message and calls aplic_program_msi_target(). Add aplic_msi_callback() as the MSI receive callback that dispatches to sbi_irqchip_process_hwirq() on the APLIC chip. Extend aplic_hwirq_setup() with an MSI path that resolves the parent IMSIC chip by parent_unique_id, registers an MSI route via sbi_irqchip_register_msi(), and stores the allocated EIID in parent_irq_map for the source being configured. Extend aplic_hwirq_set_affinity() with an MSI path that delegates affinity reprogramming to the parent IMSIC chip via sbi_irqchip_set_affinity() using the stored parent_irq_map entry. Guard warm_init, process_hwirqs, and hwirq_eoi with early returns in MSI mode as interrupt delivery and acknowledgement are handled by the IMSIC in that configuration. Signed-off-by: Oza Pawandeep <pawandeep.oza@oss.qualcomm.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260721214833.687361-3-pawandeep.oza@oss.qualcomm.com Signed-off-by: Anup Patel <anup@brainfault.org>
58 lines
1.1 KiB
C
58 lines
1.1 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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* Copyright (c) 2022 Ventana Micro Systems Inc.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __IRQCHIP_APLIC_H__
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#define __IRQCHIP_APLIC_H__
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#include <sbi/sbi_types.h>
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#include <sbi/sbi_irqchip.h>
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#define APLIC_MAX_DELEGATE 16
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struct aplic_msicfg_data {
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unsigned long lhxs;
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unsigned long lhxw;
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unsigned long hhxs;
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unsigned long hhxw;
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unsigned long base_addr;
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};
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struct aplic_delegate_data {
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u32 first_irq;
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u32 last_irq;
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u32 child_index;
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};
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struct aplic_data {
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/* Private members */
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struct sbi_irqchip_device irqchip;
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struct sbi_dlist node;
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/* Public members */
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u32 unique_id;
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u32 parent_unique_id;
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unsigned long addr;
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unsigned long size;
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unsigned long num_idc;
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unsigned long num_source;
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bool targets_mmode;
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bool has_msicfg_mmode;
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struct aplic_msicfg_data msicfg_mmode;
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bool has_msicfg_smode;
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struct aplic_msicfg_data msicfg_smode;
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struct aplic_delegate_data delegate[APLIC_MAX_DELEGATE];
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u32 *idc_map;
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};
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int aplic_cold_irqchip_init(struct aplic_data *aplic);
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void aplic_reinit_all(void);
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#endif
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