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https://github.com/riscv-software-src/opensbi.git
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5a300b32d5
A platform can have multiple APLICs in direct-mode targetting different subset of harts. Add APLIC ID to hartindex map in struct aplic_data to capture the set of harts targeted by a given APLIC in direct-mode. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260213055342.3124872-5-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel <anup@brainfault.org>
105 lines
2.2 KiB
C
105 lines
2.2 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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* Copyright (c) 2022 Ventana Micro Systems Inc.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_heap.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/irqchip/fdt_irqchip.h>
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#include <sbi_utils/irqchip/aplic.h>
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static int irqchip_aplic_update_idc_map(const void *fdt, int nodeoff,
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struct aplic_data *pd)
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{
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int i, err, count, cpu_offset, cpu_intc_offset;
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u32 phandle, hartid, hartindex;
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const fdt32_t *val;
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val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
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if (!val || count < sizeof(fdt32_t))
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return SBI_EINVAL;
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count = count / sizeof(fdt32_t);
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for (i = 0; i < count; i += 2) {
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phandle = fdt32_to_cpu(val[i]);
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cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
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if (cpu_intc_offset < 0)
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continue;
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cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
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if (cpu_offset < 0)
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continue;
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err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
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if (err)
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continue;
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hartindex = sbi_hartid_to_hartindex(hartid);
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if (hartindex == -1U)
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continue;
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pd->idc_map[i / 2] = hartindex;
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}
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return 0;
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}
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static int irqchip_aplic_cold_init(const void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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int rc;
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struct aplic_data *pd;
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pd = sbi_zalloc(sizeof(*pd));
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if (!pd)
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return SBI_ENOMEM;
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rc = fdt_parse_aplic_node(fdt, nodeoff, pd);
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if (rc)
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goto fail_free_data;
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if (pd->num_idc) {
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pd->idc_map = sbi_zalloc(sizeof(*pd->idc_map) * pd->num_idc);
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if (!pd->idc_map) {
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rc = SBI_ENOMEM;
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goto fail_free_data;
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}
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rc = irqchip_aplic_update_idc_map(fdt, nodeoff, pd);
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if (rc)
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goto fail_free_idc_map;
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}
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rc = aplic_cold_irqchip_init(pd);
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if (rc)
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goto fail_free_idc_map;
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return 0;
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fail_free_idc_map:
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if (pd->num_idc)
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sbi_free(pd->idc_map);
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fail_free_data:
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sbi_free(pd);
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return rc;
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}
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static const struct fdt_match irqchip_aplic_match[] = {
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{ .compatible = "riscv,aplic" },
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{ },
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};
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const struct fdt_driver fdt_irqchip_aplic = {
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.match_table = irqchip_aplic_match,
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.init = irqchip_aplic_cold_init,
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};
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