mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 15:31:22 +01:00
568ea49490
add reboot and poweroff support. The whole reboot and shutdown pm op includes shutdown jh7110 pmu device power domain and access on board pmic register through I2C. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
41 lines
1.0 KiB
Plaintext
41 lines
1.0 KiB
Plaintext
CONFIG_PLATFORM_ALLWINNER_D1=y
|
|
CONFIG_PLATFORM_ANDES_AE350=y
|
|
CONFIG_PLATFORM_RENESAS_RZFIVE=y
|
|
CONFIG_PLATFORM_SIFIVE_FU540=y
|
|
CONFIG_PLATFORM_SIFIVE_FU740=y
|
|
CONFIG_PLATFORM_STARFIVE_JH7110=y
|
|
CONFIG_FDT_GPIO=y
|
|
CONFIG_FDT_GPIO_SIFIVE=y
|
|
CONFIG_FDT_GPIO_STARFIVE=y
|
|
CONFIG_FDT_I2C=y
|
|
CONFIG_FDT_I2C_SIFIVE=y
|
|
CONFIG_FDT_I2C_DW=y
|
|
CONFIG_FDT_IPI=y
|
|
CONFIG_FDT_IPI_MSWI=y
|
|
CONFIG_FDT_IPI_PLICSW=y
|
|
CONFIG_FDT_IRQCHIP=y
|
|
CONFIG_FDT_IRQCHIP_APLIC=y
|
|
CONFIG_FDT_IRQCHIP_IMSIC=y
|
|
CONFIG_FDT_IRQCHIP_PLIC=y
|
|
CONFIG_FDT_RESET=y
|
|
CONFIG_FDT_RESET_ATCWDT200=y
|
|
CONFIG_FDT_RESET_GPIO=y
|
|
CONFIG_FDT_RESET_HTIF=y
|
|
CONFIG_FDT_RESET_SIFIVE_TEST=y
|
|
CONFIG_FDT_RESET_SUNXI_WDT=y
|
|
CONFIG_FDT_RESET_THEAD=y
|
|
CONFIG_FDT_SERIAL=y
|
|
CONFIG_FDT_SERIAL_CADENCE=y
|
|
CONFIG_FDT_SERIAL_GAISLER=y
|
|
CONFIG_FDT_SERIAL_HTIF=y
|
|
CONFIG_FDT_SERIAL_RENESAS_SCIF=y
|
|
CONFIG_FDT_SERIAL_SHAKTI=y
|
|
CONFIG_FDT_SERIAL_SIFIVE=y
|
|
CONFIG_FDT_SERIAL_LITEX=y
|
|
CONFIG_FDT_SERIAL_UART8250=y
|
|
CONFIG_FDT_SERIAL_XILINX_UARTLITE=y
|
|
CONFIG_FDT_TIMER=y
|
|
CONFIG_FDT_TIMER_MTIMER=y
|
|
CONFIG_FDT_TIMER_PLMT=y
|
|
CONFIG_SERIAL_SEMIHOSTING=y
|