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52ac3de50c
When powering up cores, wait for power up to complete using tight loop. This saves 10ms delay observed for every core Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260223-for-upstream-eyeq7h-v3-6-621d004d1a21@mobileye.com Signed-off-by: Anup Patel <anup@brainfault.org>