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https://github.com/riscv-software-src/opensbi.git
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The OpenPiton framework has a generic PMU that is not used by OpenSBI. Due to OpenSBI’s build system we cannot directly reuse the generic platform functions, so move the OpenPiton platform to generic. Also due to the generic platform is where new features are added. Signed-off-by: Manuel Hernández Méndez <maherme.dev@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250813104759.33276-1-maherme.dev@gmail.com Signed-off-by: Anup Patel <anup@brainfault.org>
174 lines
4.7 KiB
C
174 lines
4.7 KiB
C
// SPDX-License-Identifier: BSD-2-Clause
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/*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*/
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#include <platform_override.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000ULL
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#define OPENPITON_DEFAULT_UART_FREQ 60000000
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#define OPENPITON_DEFAULT_UART_BAUDRATE 115200
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#define OPENPITON_DEFAULT_UART_REG_SHIFT 0
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#define OPENPITON_DEFAULT_UART_REG_WIDTH 1
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#define OPENPITON_DEFAULT_UART_REG_OFFSET 0
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#define OPENPITON_DEFAULT_UART_CAPS 0
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#define OPENPITON_DEFAULT_PLIC_ADDR 0xfff1100000ULL
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#define OPENPITON_DEFAULT_PLIC_SIZE (0x200000 + \
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(OPENPITON_DEFAULT_HART_COUNT * 0x1000))
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#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
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#define OPENPITON_DEFAULT_HART_COUNT 3
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#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000ULL
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#define OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ 1000000
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#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \
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(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
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#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR \
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(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MTIMER_OFFSET)
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static struct platform_uart_data uart = {
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(unsigned long)OPENPITON_DEFAULT_UART_ADDR,
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OPENPITON_DEFAULT_UART_FREQ,
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OPENPITON_DEFAULT_UART_BAUDRATE,
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};
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static struct plic_data plic = {
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.addr = (unsigned long)OPENPITON_DEFAULT_PLIC_ADDR,
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.size = OPENPITON_DEFAULT_PLIC_SIZE,
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.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
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.flags = PLIC_FLAG_ARIANE_BUG,
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.context_map = {
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[0] = { 0, 1 },
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[1] = { 2, 3 },
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[2] = { 4, 5 },
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},
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};
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static struct aclint_mswi_data mswi = {
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.addr = (unsigned long)OPENPITON_DEFAULT_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = OPENPITON_DEFAULT_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.mtime_freq = OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ,
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.mtime_addr = (unsigned long)OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIME_OFFSET,
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.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
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.mtimecmp_addr = (unsigned long)OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIMECMP_OFFSET,
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.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
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.first_hartid = 0,
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.hart_count = OPENPITON_DEFAULT_HART_COUNT,
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.has_64bit_mmio = true,
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};
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/*
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* OpenPiton platform early initialization.
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*/
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static int openpiton_early_init(bool cold_boot)
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{
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const void *fdt;
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struct platform_uart_data uart_data = { 0 };
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struct plic_data plic_data = plic;
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unsigned long aclint_freq;
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uint64_t clint_addr;
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int rc;
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if (!cold_boot)
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return 0;
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fdt = fdt_get_address();
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rc = fdt_parse_uart8250(fdt, &uart_data, "ns16550");
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if (!rc)
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uart = uart_data;
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rc = fdt_parse_plic(fdt, &plic_data, "riscv,plic0");
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if (!rc)
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plic = plic_data;
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rc = fdt_parse_timebase_frequency(fdt, &aclint_freq);
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if (!rc)
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mtimer.mtime_freq = aclint_freq;
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rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
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if (!rc) {
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mswi.addr = clint_addr;
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mtimer.mtime_addr = clint_addr + CLINT_MTIMER_OFFSET +
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ACLINT_DEFAULT_MTIME_OFFSET;
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mtimer.mtimecmp_addr = clint_addr + CLINT_MTIMER_OFFSET +
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ACLINT_DEFAULT_MTIMECMP_OFFSET;
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}
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return uart8250_init(uart.addr, uart.freq, uart.baud,
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OPENPITON_DEFAULT_UART_REG_SHIFT,
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OPENPITON_DEFAULT_UART_REG_WIDTH,
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OPENPITON_DEFAULT_UART_REG_OFFSET,
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OPENPITON_DEFAULT_UART_CAPS);
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}
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/*
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* OpenPiton platform final initialization.
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*/
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static int openpiton_final_init(bool cold_boot)
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{
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void *fdt;
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if (!cold_boot)
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return 0;
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fdt = fdt_get_address_rw();
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fdt_fixups(fdt);
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return 0;
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}
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/*
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* Initialize the openpiton interrupt controller during cold boot.
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*/
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static int openpiton_irqchip_init(void)
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{
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return plic_cold_irqchip_init(&plic);
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}
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/*
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* Initialize IPI during cold boot.
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*/
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static int openpiton_ipi_init(void)
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{
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return aclint_mswi_cold_init(&mswi);
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}
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/*
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* Initialize openpiton timer during cold boot.
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*/
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static int openpiton_timer_init(void)
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{
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return aclint_mtimer_cold_init(&mtimer, NULL);
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}
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static int openhwgroup_openpiton_platform_init(const void *fdt, int nodeoff, const struct fdt_match *match)
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{
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generic_platform_ops.early_init = openpiton_early_init;
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generic_platform_ops.timer_init = openpiton_timer_init;
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generic_platform_ops.ipi_init = openpiton_ipi_init;
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generic_platform_ops.irqchip_init = openpiton_irqchip_init;
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generic_platform_ops.final_init = openpiton_final_init;
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return 0;
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}
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static const struct fdt_match openhwgroup_openpiton_match[] = {
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{ .compatible = "openpiton,cva6platform" },
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{ },
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};
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const struct fdt_driver openhwgroup_openpiton = {
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.match_table = openhwgroup_openpiton_match,
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.init = openhwgroup_openpiton_platform_init,
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};
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