mirror of
https://github.com/riscv-software-src/opensbi.git
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Xiang W
4e79fd7de5
Commit 4813a20420 ("lib: sbi_init: Call hart init and timer init
before platform early init") reordered the cold/warm boot sequence so
that sbi_timer_init() runs before sbi_platform_early_init().
The SG2042 platform workaround that merges the 16 separate timer
regions into a single domain memregion was previously performed in
early_init(). After the reordering the MTIMER driver therefore adds
the individual regions first, defeating the purpose of the combined
region (and wasting PMP entries).
Move the addition of the combined memregion into extensions_init(),
which is invoked from sbi_hart_init() and consequently still executes
before sbi_timer_init().
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Xiang W <wangxiang@iscas.ac.cn>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260721150844.741606-1-wangxiang@iscas.ac.cn
Signed-off-by: Anup Patel <anup@brainfault.org>
83 lines
1.8 KiB
C
83 lines
1.8 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Authors:
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* Inochi Amaoto <inochiama@outlook.com>
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*
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*/
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#include <platform_override.h>
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#include <thead/c9xx_errata.h>
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#include <thead/c9xx_pmu.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_scratch.h>
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#include <sbi/sbi_string.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define SOPHGO_SG2042_TIMER_BASE 0x70ac000000ULL
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#define SOPHGO_SG2042_TIMER_SIZE 0x10000UL
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#define SOPHGO_SG2042_TIMER_NUM 16
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static int sophgo_sg2042_early_init(bool cold_boot)
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{
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int rc;
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rc = generic_early_init(cold_boot);
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if (rc)
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return rc;
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thead_register_tlb_flush_trap_handler();
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return 0;
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}
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static int sophgo_sg2042_extensions_init(bool cold_boot)
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{
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int rc;
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rc = generic_extensions_init(cold_boot);
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if (rc)
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return rc;
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/*
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* SG2042 has 16 separate timers. Add one combined region before the
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* MTIMER driver adds the individual regions.
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*/
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if (cold_boot) {
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rc = sbi_domain_root_add_memrange(
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(ulong)SOPHGO_SG2042_TIMER_BASE,
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SOPHGO_SG2042_TIMER_SIZE *
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SOPHGO_SG2042_TIMER_NUM,
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MTIMER_REGION_ALIGN,
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(SBI_DOMAIN_MEMREGION_MMIO |
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SBI_DOMAIN_MEMREGION_M_READABLE |
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SBI_DOMAIN_MEMREGION_M_WRITABLE));
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if (rc)
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return rc;
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}
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thead_c9xx_register_pmu_device();
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return 0;
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}
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static int sophgo_sg2042_platform_init(const void *fdt, int nodeoff, const struct fdt_match *match)
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{
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generic_platform_ops.early_init = sophgo_sg2042_early_init;
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generic_platform_ops.extensions_init = sophgo_sg2042_extensions_init;
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return 0;
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}
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static const struct fdt_match sophgo_sg2042_match[] = {
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{ .compatible = "sophgo,sg2042" },
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{ },
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};
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const struct fdt_driver sophgo_sg2042 = {
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.match_table = sophgo_sg2042_match,
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.init = sophgo_sg2042_platform_init,
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};
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