mirror of
https://github.com/riscv-software-src/opensbi.git
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4e2cd47820
On latest Linux kernel (i.e. 5.2-rc1), we get large TLB flush
request for user space addresses (typically, start=x and end=-1).
This is caused by Linux kernel commit a21344dfc6 ("riscv: fix
sbi_remote_sfence_vma{,_asid}").
It's not practical to execute large number of sfence instructions
for a large TLB flush range because it takes too much time and
eventually causes CPU stall in Linux kernel.
This patch addresses above issue by upgrading TLB flush range to
TLB flush all whenever TLB flush range is greater than 1GB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
198 lines
5.5 KiB
C
198 lines
5.5 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __RISCV_ASM_H__
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#define __RISCV_ASM_H__
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#include <sbi/riscv_encoding.h>
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/* clang-format off */
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#ifdef __ASSEMBLY__
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#define __ASM_STR(x) x
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#else
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#define __ASM_STR(x) #x
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#endif
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#if __riscv_xlen == 64
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#define __REG_SEL(a, b) __ASM_STR(a)
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#elif __riscv_xlen == 32
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#define __REG_SEL(a, b) __ASM_STR(b)
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#else
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#error "Unexpected __riscv_xlen"
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#endif
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#define PAGE_SHIFT (12)
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#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
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#define PAGE_MASK (~(PAGE_SIZE - 1))
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#define SBI_TLB_FLUSH_ALL ((unsigned long)-1)
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#define SBI_TLB_FLUSH_MAX_SIZE (1UL << 30)
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#define REG_L __REG_SEL(ld, lw)
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#define REG_S __REG_SEL(sd, sw)
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#define SZREG __REG_SEL(8, 4)
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#define LGREG __REG_SEL(3, 2)
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#if __SIZEOF_POINTER__ == 8
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#define BITS_PER_LONG 64
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#ifdef __ASSEMBLY__
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#define RISCV_PTR .dword
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#define RISCV_SZPTR 8
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#define RISCV_LGPTR 3
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#else
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#define RISCV_PTR ".dword"
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#define RISCV_SZPTR "8"
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#define RISCV_LGPTR "3"
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#endif
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#elif __SIZEOF_POINTER__ == 4
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#define BITS_PER_LONG 32
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#ifdef __ASSEMBLY__
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#define RISCV_PTR .word
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#define RISCV_SZPTR 4
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#define RISCV_LGPTR 2
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#else
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#define RISCV_PTR ".word"
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#define RISCV_SZPTR "4"
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#define RISCV_LGPTR "2"
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#endif
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#else
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#error "Unexpected __SIZEOF_POINTER__"
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#endif
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#if (__SIZEOF_INT__ == 4)
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#define RISCV_INT __ASM_STR(.word)
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#define RISCV_SZINT __ASM_STR(4)
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#define RISCV_LGINT __ASM_STR(2)
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#else
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#error "Unexpected __SIZEOF_INT__"
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#endif
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#if (__SIZEOF_SHORT__ == 2)
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#define RISCV_SHORT __ASM_STR(.half)
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#define RISCV_SZSHORT __ASM_STR(2)
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#define RISCV_LGSHORT __ASM_STR(1)
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#else
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#error "Unexpected __SIZEOF_SHORT__"
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#endif
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/* clang-format on */
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#ifndef __ASSEMBLY__
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#define csr_swap(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrrw %0, " __ASM_STR(csr) ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__("csrr %0, " __ASM_STR(csr) \
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: "=r"(__v) \
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: \
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: "memory"); \
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__v; \
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})
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#define csr_write(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrw " __ASM_STR(csr) ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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#define csr_read_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrrs %0, " __ASM_STR(csr) ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_set(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrs " __ASM_STR(csr) ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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#define csr_read_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrrc %0, " __ASM_STR(csr) ", %1" \
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: "=r"(__v) \
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: "rK"(__v) \
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: "memory"); \
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__v; \
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})
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#define csr_clear(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__("csrc " __ASM_STR(csr) ", %0" \
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: \
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: "rK"(__v) \
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: "memory"); \
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})
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unsigned long csr_read_num(int csr_num);
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void csr_write_num(int csr_num, unsigned long val);
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#define wfi() \
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do { \
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__asm__ __volatile__("wfi" ::: "memory"); \
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} while (0)
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static inline int misa_extension(char ext)
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{
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return csr_read(CSR_MISA) & (1 << (ext - 'A'));
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}
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static inline int misa_xlen(void)
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{
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return ((long)csr_read(CSR_MISA) < 0) ? 64 : 32;
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}
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static inline void misa_string(char *out, unsigned int out_sz)
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{
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unsigned long i, val = csr_read(CSR_MISA);
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for (i = 0; i < 26; i++) {
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if (val & (1 << i)) {
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*out = 'A' + i;
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out++;
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}
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}
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*out = '\0';
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out++;
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}
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int pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
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unsigned long log2len);
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int pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
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unsigned long *log2len_out);
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#endif /* !__ASSEMBLY__ */
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#endif
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