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Separate the implement of T-HEAD c9xx errata to allow any platform with bug related to c9xx cores can use it. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Anup Patel <anup@brainfault.org>
14 lines
344 B
C
14 lines
344 B
C
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#ifndef __RISCV_THEAD_C9XX_ERRATA_H____
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#define __RISCV_THEAD_C9XX_ERRATA_H____
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/**
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* T-HEAD board with this quirk need to execute sfence.vma to flush
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* stale entrie avoid incorrect memory access.
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*/
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#define THEAD_QUIRK_ERRATA_TLB_FLUSH BIT(0)
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void thead_register_tlb_flush_trap_handler(void);
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#endif // __RISCV_THEAD_C9XX_ERRATA_H____
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