Samuel Holland 9dc5ec5c51 platform: Add HSM implementation for Allwinner D1 ...

Allwinner D1 contains a "PPU" power domain controller which can
automatically power down/up the CPU power domain. This power domain
includes the C906 core along with its CLINT and PLIC.

This HSM implementation supports non-retentive hart suspend by:
  1) Saving/restoring state that is lost during hart suspend,
  2) Performing cache maintenance before/after hart suspend,
  3) Configuring wakeup sources before hart suspend, and
  4) Asking the PPU to power down the hart when it enters WFI.

Since this HSM implementation is for a single-core SoC, it does not need
to worry about concurrency or saving multiple instances of state.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>

2022-06-13 11:59:09 +05:30

..

allwinner

platform: Add HSM implementation for Allwinner D1

2022-06-13 11:59:09 +05:30

include

platform: generic: add overrides for vendor extensions

2022-06-13 11:17:38 +05:30

sifive

platform: generic: Move Sifive platform overrides into own directory

2022-05-13 09:27:23 +05:30

config.mk

config.mk: Update QEMU run command for generic and sifive fu540 platforms

2020-06-29 09:17:24 +05:30

objects.mk

platform: generic: Move Sifive platform overrides into own directory

2022-05-13 09:27:23 +05:30

platform_override_modules.carray

platform: generic: Generate platform override module list at compile-time

2022-05-13 09:27:18 +05:30

platform.c

platform: generic: add overrides for vendor extensions

2022-06-13 11:17:38 +05:30