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https://github.com/riscv-software-src/opensbi.git
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We extend struct sbi_platform and struct sbi_scratch to allow platforms specify the heap size to the OpenSBI firmwares. The OpenSBI firmwares will use this information to determine the location of heap and provide heap base address in per-HART scratch space. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
158 lines
3.7 KiB
C
158 lines
3.7 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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/*
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* Include these files as needed.
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* See objects.mk PLATFORM_xxx configuration parameters.
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*/
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define PLATFORM_PLIC_ADDR 0xc000000
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#define PLATFORM_PLIC_NUM_SOURCES 128
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#define PLATFORM_HART_COUNT 4
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#define PLATFORM_CLINT_ADDR 0x2000000
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#define PLATFORM_ACLINT_MTIMER_FREQ 10000000
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#define PLATFORM_ACLINT_MSWI_ADDR (PLATFORM_CLINT_ADDR + \
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CLINT_MSWI_OFFSET)
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#define PLATFORM_ACLINT_MTIMER_ADDR (PLATFORM_CLINT_ADDR + \
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CLINT_MTIMER_OFFSET)
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#define PLATFORM_UART_ADDR 0x09000000
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#define PLATFORM_UART_INPUT_FREQ 10000000
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#define PLATFORM_UART_BAUDRATE 115200
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static struct plic_data plic = {
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.addr = PLATFORM_PLIC_ADDR,
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.num_src = PLATFORM_PLIC_NUM_SOURCES,
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};
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static struct aclint_mswi_data mswi = {
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.addr = PLATFORM_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = PLATFORM_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.mtime_freq = PLATFORM_ACLINT_MTIMER_FREQ,
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.mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIME_OFFSET,
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.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
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.mtimecmp_addr = PLATFORM_ACLINT_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIMECMP_OFFSET,
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.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
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.first_hartid = 0,
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.hart_count = PLATFORM_HART_COUNT,
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.has_64bit_mmio = true,
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};
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/*
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* Platform early initialization.
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*/
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static int platform_early_init(bool cold_boot)
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{
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return 0;
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}
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/*
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* Platform final initialization.
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*/
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static int platform_final_init(bool cold_boot)
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{
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return 0;
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}
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/*
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* Initialize the platform console.
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*/
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static int platform_console_init(void)
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{
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/* Example if the generic UART8250 driver is used */
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return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
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PLATFORM_UART_BAUDRATE, 0, 1, 0);
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}
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/*
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* Initialize the platform interrupt controller for current HART.
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*/
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static int platform_irqchip_init(bool cold_boot)
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{
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u32 hartid = current_hartid();
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int ret;
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/* Example if the generic PLIC driver is used */
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if (cold_boot) {
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ret = plic_cold_irqchip_init(&plic);
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if (ret)
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return ret;
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}
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return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
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}
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/*
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* Initialize IPI for current HART.
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*/
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static int platform_ipi_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic ACLINT driver is used */
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if (cold_boot) {
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ret = aclint_mswi_cold_init(&mswi);
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if (ret)
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return ret;
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}
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return aclint_mswi_warm_init();
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}
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/*
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* Initialize platform timer for current HART.
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*/
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static int platform_timer_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic ACLINT driver is used */
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if (cold_boot) {
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ret = aclint_mtimer_cold_init(&mtimer, NULL);
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if (ret)
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return ret;
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}
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return aclint_mtimer_warm_init();
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}
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/*
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* Platform descriptor.
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*/
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const struct sbi_platform_operations platform_ops = {
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.early_init = platform_early_init,
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.final_init = platform_final_init,
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.console_init = platform_console_init,
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.irqchip_init = platform_irqchip_init,
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.ipi_init = platform_ipi_init,
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.timer_init = platform_timer_init
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version = SBI_PLATFORM_VERSION(0x0, 0x00),
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.name = "platform-name",
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.features = SBI_PLATFORM_DEFAULT_FEATURES,
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.hart_count = 1,
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.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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.heap_size = SBI_PLATFORM_DEFAULT_HEAP_SIZE(1),
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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