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https://github.com/riscv-software-src/opensbi.git
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Nicholas Piggin
6767861c48
Add the Tenstorrent Atlantis as a generic-platform. This initial support enables the single_fw_region option, and verifies and prints HART PMA CSR configuration. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260424062520.238403-1-npiggin@gmail.com Signed-off-by: Anup Patel <anup@brainfault.org>
139 lines
3.8 KiB
C
139 lines
3.8 KiB
C
/*
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* SPDX-FileCopyrightText: (c) 2025-2026 Tenstorrent USA, Inc.
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_math.h>
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#include <libfdt.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <tenstorrent/pma.h>
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/*
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* All PMAs in the system should be the same (after boot). The init code
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* must have set PMAs for all HARTs.
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*/
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/*
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* Ascalon CPU and IOMMU PMA layout:
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* Field
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* [2:0] Permission [0] Read, [1] Write, [2] Execute
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* [4:3] Memory type 00: Main memory, 01: IO memory relaxed,
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* 10: IO memory channel 0, 11: IO memory channel 1
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* [6:5] AMO type 00: AMONone, 01: AMOSwap,
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* 10: AMOLogical, 11: AMOArithmetic
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* [7] Cacheability (main memory type)
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* 1: Cacheable, 0: Non-cacheable
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* Combining Capability (IO memory type)
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* 1: Combining allowed, 0: Combining disallowed
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* [8] Routing (coherency)
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* 1: Coherent network, 0: Non-coherent network
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* [11:9] Reserved
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* [51:12] Physical address [51:12] base
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* [63:58] Size log 2 (number of address LSB to ignore when matching)
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* 0 = invalid entry (no match)
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*/
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#define PMA_PERMISSION_R 0x1
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#define PMA_PERMISSION_W 0x2
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#define PMA_PERMISSION_X 0x4
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#define PMA_PERMISSION_MASK 0x7
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#define PMA_TYPE_MAIN_MEMORY 0x0
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#define PMA_TYPE_IO_RELAXED 0x8
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#define PMA_TYPE_IO_ORDERED_0 0x10
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#define PMA_TYPE_IO_ORDERED_1 0x18
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#define PMA_TYPE_MASK 0x18
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#define PMA_AMO_NONE 0x0
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#define PMA_AMO_SWAP 0x20
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#define PMA_AMO_LOGICAL 0x40
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#define PMA_AMO_ARITHMETIC 0x60
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#define PMA_AMO_MASK 0x60
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#define PMA_MEMORY_CACHEABLE 0x80
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#define PMA_IO_COMBINING 0x80
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#define PMA_ROUTING_COHERENT 0x100
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#define PMA_FLAGS_MASK 0x00000000000001ffULL
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#define PMA_ADDRESS_MASK 0x000ffffffffff000ULL
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#define PMA_SIZE_MASK 0xfc00000000000000ULL
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#define PMA_RESERVED_MASK 0x0300000000000e00ULL
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#define PMA_SIZE_SHIFT 58
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static u64 tt_pma_size(u64 pma)
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{
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if ((pma & PMA_SIZE_MASK) == 0)
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return 0;
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return 1ULL << ((pma & PMA_SIZE_MASK) >> PMA_SIZE_SHIFT);
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}
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static u64 tt_pma_address(u64 pma)
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{
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return (pma & PMA_ADDRESS_MASK) & ~((tt_pma_size(pma) - 1));
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}
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bool tt_pma_validate(unsigned int i, u64 pma)
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{
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if (!pma)
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return true;
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if (pma & PMA_RESERVED_MASK) {
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sbi_printf("PMA%02u 0x%016lx contains reserved bits\n", i, pma);
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return false;
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}
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if (tt_pma_size(pma) < 4096) {
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sbi_printf("PMA%02u 0x%016lx size < 4KB\n", i, pma);
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return false;
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}
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if (tt_pma_address(pma) != (pma & PMA_ADDRESS_MASK)) {
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sbi_printf("PMA%02u 0x%016lx address is not aligned to size\n", i, pma);
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return false;
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}
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return true;
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}
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void tt_pma_print(unsigned int i, u64 pma)
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{
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sbi_printf("PMA%02d : 0x%016lx-0x%016lx perm:%s%s%s type:%s %s %s amo:%s\n", i,
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tt_pma_address(pma), tt_pma_address(pma) + tt_pma_size(pma) - 1,
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pma & PMA_PERMISSION_R ? "R" : " ",
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pma & PMA_PERMISSION_W ? "W" : " ",
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pma & PMA_PERMISSION_X ? "X" : " ",
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(pma & PMA_TYPE_MASK) == PMA_TYPE_MAIN_MEMORY ? "main-memory" :
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((pma & PMA_TYPE_MASK) == PMA_TYPE_IO_RELAXED ? "io-relaxed" :
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((pma & PMA_TYPE_MASK) == PMA_TYPE_IO_ORDERED_0 ? "io-ordered-0" : "io-ordered-1")),
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(pma & PMA_TYPE_MASK) == PMA_TYPE_MAIN_MEMORY ?
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(pma & PMA_MEMORY_CACHEABLE ? "cacheable" : "non-cacheable") :
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(pma & PMA_IO_COMBINING ? "combining" : "non-combining"),
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pma & PMA_ROUTING_COHERENT ? "coherent" : "non-coherent",
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(pma & PMA_AMO_MASK) == PMA_AMO_NONE ? "none" :
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((pma & PMA_AMO_MASK) == PMA_AMO_SWAP ? "swap" :
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((pma & PMA_AMO_MASK) == PMA_AMO_LOGICAL ? "logical" : "arithmetic")));
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}
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static u64 pmas[TT_MAX_PMAS];
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void tt_pma_set(unsigned int n, u64 pma)
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{
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if (n >= TT_MAX_PMAS)
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sbi_panic("PMA exceeded TT_MAX_PMAS");
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pmas[n] = pma;
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}
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u64 tt_pma_get(unsigned int n)
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{
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if (n >= TT_MAX_PMAS)
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sbi_panic("PMA exceeded TT_MAX_PMAS");
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return pmas[n];
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}
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