mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 15:31:22 +01:00
1e9f88889f
For platforms not having TIME CSR, we trap-n-emulate TIME CSR read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR as well so we trap-n-emulate HTIMEDELTA CSR for platforms not having TIME CSR. Signed-off-by: Anup Patel <anup.patel@wdc.com>
186 lines
4.4 KiB
C
186 lines
4.4 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_bits.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_emulate_csr.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_trap.h>
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int sbi_emulate_csr_read(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
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struct sbi_scratch *scratch, ulong *csr_val)
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{
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int ret = 0;
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ulong cen = -1UL;
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ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
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#if __riscv_xlen == 32
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bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
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#else
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bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
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#endif
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if (prev_mode == PRV_U)
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cen = csr_read(CSR_SCOUNTEREN);
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switch (csr_num) {
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case CSR_HTIMEDELTA:
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if (prev_mode == PRV_S && !virt)
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*csr_val = sbi_timer_get_delta(scratch);
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else
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ret = SBI_ENOTSUPP;
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break;
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case CSR_CYCLE:
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if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MCYCLE);
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break;
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case CSR_TIME:
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if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = (virt) ? sbi_timer_virt_value(scratch):
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sbi_timer_value(scratch);
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break;
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case CSR_INSTRET:
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if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MINSTRET);
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break;
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case CSR_MHPMCOUNTER3:
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if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MHPMCOUNTER3);
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break;
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case CSR_MHPMCOUNTER4:
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if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MHPMCOUNTER4);
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break;
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#if __riscv_xlen == 32
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case CSR_HTIMEDELTAH:
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if (prev_mode == PRV_S && !virt)
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*csr_val = sbi_timer_get_delta(scratch) >> 32;
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else
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ret = SBI_ENOTSUPP;
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break;
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case CSR_CYCLEH:
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if (!((cen >> (CSR_CYCLE - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MCYCLEH);
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break;
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case CSR_TIMEH:
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if (!((cen >> (CSR_TIME - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = (virt) ? sbi_timer_virt_value(scratch) >> 32:
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sbi_timer_value(scratch) >> 32;
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break;
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case CSR_INSTRETH:
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if (!((cen >> (CSR_INSTRET - CSR_CYCLE)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MINSTRETH);
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break;
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case CSR_MHPMCOUNTER3H:
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if (!((cen >> (3 + CSR_MHPMCOUNTER3 - CSR_MHPMCOUNTER3)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MHPMCOUNTER3H);
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break;
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case CSR_MHPMCOUNTER4H:
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if (!((cen >> (3 + CSR_MHPMCOUNTER4 - CSR_MHPMCOUNTER3)) & 1))
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return -1;
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*csr_val = csr_read(CSR_MHPMCOUNTER4H);
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break;
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#endif
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case CSR_MHPMEVENT3:
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*csr_val = csr_read(CSR_MHPMEVENT3);
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break;
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case CSR_MHPMEVENT4:
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*csr_val = csr_read(CSR_MHPMEVENT4);
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break;
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default:
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ret = SBI_ENOTSUPP;
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break;
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};
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if (ret)
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sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
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__func__, hartid, csr_num);
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return ret;
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}
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int sbi_emulate_csr_write(int csr_num, u32 hartid, struct sbi_trap_regs *regs,
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struct sbi_scratch *scratch, ulong csr_val)
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{
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int ret = 0;
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ulong prev_mode = (regs->mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
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#if __riscv_xlen == 32
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bool virt = (regs->mstatusH & MSTATUSH_MPV) ? TRUE : FALSE;
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#else
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bool virt = (regs->mstatus & MSTATUS_MPV) ? TRUE : FALSE;
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#endif
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switch (csr_num) {
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case CSR_HTIMEDELTA:
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if (prev_mode == PRV_S && !virt)
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sbi_timer_set_delta(scratch, csr_val);
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else
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ret = SBI_ENOTSUPP;
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break;
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case CSR_CYCLE:
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csr_write(CSR_MCYCLE, csr_val);
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break;
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case CSR_INSTRET:
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csr_write(CSR_MINSTRET, csr_val);
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break;
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case CSR_MHPMCOUNTER3:
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csr_write(CSR_MHPMCOUNTER3, csr_val);
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break;
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case CSR_MHPMCOUNTER4:
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csr_write(CSR_MHPMCOUNTER4, csr_val);
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break;
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#if __riscv_xlen == 32
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case CSR_HTIMEDELTAH:
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if (prev_mode == PRV_S && !virt)
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sbi_timer_set_delta_upper(scratch, csr_val);
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else
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ret = SBI_ENOTSUPP;
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break;
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case CSR_CYCLEH:
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csr_write(CSR_MCYCLEH, csr_val);
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break;
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case CSR_INSTRETH:
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csr_write(CSR_MINSTRETH, csr_val);
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break;
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case CSR_MHPMCOUNTER3H:
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csr_write(CSR_MHPMCOUNTER3H, csr_val);
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break;
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case CSR_MHPMCOUNTER4H:
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csr_write(CSR_MHPMCOUNTER4H, csr_val);
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break;
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#endif
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case CSR_MHPMEVENT3:
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csr_write(CSR_MHPMEVENT3, csr_val);
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break;
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case CSR_MHPMEVENT4:
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csr_write(CSR_MHPMEVENT4, csr_val);
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break;
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default:
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ret = SBI_ENOTSUPP;
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break;
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};
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if (ret)
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sbi_dprintf(scratch, "%s: hartid%d: invalid csr_num=0x%x\n",
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__func__, hartid, csr_num);
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return ret;
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}
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