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https://github.com/riscv-software-src/opensbi.git
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Bo Gan
1475f147f6
The load/store address offset between the uptrap and the orig_trap can be derived by orig_trap->tval - uptrap->tval, thus refactor the function prototype for simplicity. For vector load, sbi_misaligned_v_tinst_fixup is introduced. There's no transformed instruction for vector load/store, so null out tinst if the fault is not a guest-page fault. Signed-off-by: Bo Gan <ganboing@gmail.com> Tested-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260609060024.706-3-ganboing@gmail.com Signed-off-by: Anup Patel <anup@brainfault.org>
38 lines
811 B
C
38 lines
811 B
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __SBI_TRAP_LDST_H__
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#define __SBI_TRAP_LDST_H__
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#include <sbi/sbi_types.h>
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#include <sbi/sbi_trap.h>
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union sbi_ldst_data {
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u64 data_u64;
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u32 data_u32;
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u8 data_bytes[8];
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ulong data_ulong;
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};
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int sbi_misaligned_load_handler(struct sbi_trap_context *tcntx);
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int sbi_misaligned_store_handler(struct sbi_trap_context *tcntx);
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int sbi_load_access_handler(struct sbi_trap_context *tcntx);
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int sbi_store_access_handler(struct sbi_trap_context *tcntx);
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int sbi_misaligned_v_ld_emulator(ulong insn,
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struct sbi_trap_context *tcntx);
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int sbi_misaligned_v_st_emulator(ulong insn,
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struct sbi_trap_context *tcntx);
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#endif
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