Yu Chien Peter Lin 127a3f2ab4 platform: andes/ae350: Use fdt irqchip driver ...

Andes PLIC is compatible with plic driver. The PLIC base address and
number of source can be obtained by parsing the device tree.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>

2022-10-23 10:29:58 +05:30

..

configs

Makefile: Add initial kconfig support for each platform

2022-08-08 09:33:09 +05:30

cache.c

platform: Add AE350 cache control SBIs

2020-06-10 09:28:52 +05:30

cache.h

platform: Add AE350 cache control SBIs

2020-06-10 09:28:52 +05:30

Kconfig

platform: andes/ae350: Use fdt irqchip driver

2022-10-23 10:29:58 +05:30

objects.mk

lib: utils/timer: Add Andes fdt timer support

2022-10-23 10:26:39 +05:30

platform.c

platform: andes/ae350: Use fdt irqchip driver

2022-10-23 10:29:58 +05:30

platform.h

platform: andes/ae350: Use fdt irqchip driver

2022-10-23 10:29:58 +05:30

plicsw.c

platform: andes/ae350: Drop plicsw_get_pending()

2021-06-11 11:20:18 +05:30

plicsw.h

platform: andes/ae350: Drop plicsw_ipi_sync()

2021-06-11 11:21:14 +05:30