mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 15:31:22 +01:00
043d088e39
Instead of having system_reset_check() and system_reset() callbacks in platform operations, it will be much simpler for reset driver to directly register these operations as a device to the sbi_system implementation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
138 lines
2.9 KiB
C
138 lines
2.9 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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/*
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* Include these files as needed.
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* See config.mk PLATFORM_xxx configuration parameters.
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*/
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#define PLATFORM_PLIC_ADDR 0xc000000
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#define PLATFORM_PLIC_NUM_SOURCES 128
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#define PLATFORM_HART_COUNT 4
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#define PLATFORM_CLINT_ADDR 0x2000000
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#define PLATFORM_UART_ADDR 0x09000000
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#define PLATFORM_UART_INPUT_FREQ 10000000
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#define PLATFORM_UART_BAUDRATE 115200
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static struct plic_data plic = {
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.addr = PLATFORM_PLIC_ADDR,
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.num_src = PLATFORM_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = PLATFORM_CLINT_ADDR,
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.first_hartid = 0,
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.hart_count = PLATFORM_HART_COUNT,
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.has_64bit_mmio = TRUE,
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};
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/*
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* Platform early initialization.
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*/
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static int platform_early_init(bool cold_boot)
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{
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return 0;
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}
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/*
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* Platform final initialization.
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*/
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static int platform_final_init(bool cold_boot)
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{
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return 0;
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}
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/*
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* Initialize the platform console.
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*/
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static int platform_console_init(void)
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{
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/* Example if the generic UART8250 driver is used */
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return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
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PLATFORM_UART_BAUDRATE, 0, 1);
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}
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/*
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* Initialize the platform interrupt controller for current HART.
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*/
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static int platform_irqchip_init(bool cold_boot)
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{
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u32 hartid = current_hartid();
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int ret;
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/* Example if the generic PLIC driver is used */
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if (cold_boot) {
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ret = plic_cold_irqchip_init(&plic);
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if (ret)
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return ret;
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}
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return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
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}
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/*
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* Initialize IPI for current HART.
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*/
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static int platform_ipi_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic CLINT driver is used */
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if (cold_boot) {
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ret = clint_cold_ipi_init(&clint);
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if (ret)
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return ret;
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}
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return clint_warm_ipi_init();
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}
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/*
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* Initialize platform timer for current HART.
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*/
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static int platform_timer_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic CLINT driver is used */
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if (cold_boot) {
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ret = clint_cold_timer_init(&clint, NULL);
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if (ret)
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return ret;
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}
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return clint_warm_timer_init();
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}
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/*
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* Platform descriptor.
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*/
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const struct sbi_platform_operations platform_ops = {
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.early_init = platform_early_init,
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.final_init = platform_final_init,
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.console_init = platform_console_init,
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.irqchip_init = platform_irqchip_init,
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.ipi_init = platform_ipi_init,
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.timer_init = platform_timer_init
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version = SBI_PLATFORM_VERSION(0x0, 0x00),
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.name = "platform-name",
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.features = SBI_PLATFORM_DEFAULT_FEATURES,
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.hart_count = 1,
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.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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