Currently, we aggresively use atomic operation on CLINT IPI
register. This patch simplify CLINT IPI APIs by reducing use
of atomic operations. In future, we will gradually increase
use of atomic operations for CLINT IPI APIs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The QEMU sifive_u machine is not excatly same as HiFive Unleashed
board hence we add separate platform support for QEMU sifive_u
machine.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Emulation of CSR read for misa and mhartid was a workaround for
bootloader accessing these CSRs in S-mode. This patch removes
CSR read emulation for misa and mhartid.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
