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6ad246a1494807ee91e36ffcf60e4c30bb309d45
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2 Commits
Author SHA1 Message Date
Benoît Monin 6ad246a149 platform: generic: metanoia/mt2824: configure PMA for DSP memory regions 
Set up the memory attribute for the XOR RAM, MRAS memory, and RSC table
used by the DSPs as non-cacheable and bufferable during final init.

Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260902-mt2824-pma-v1-1-ada8f836365d@bootlin.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-09-28 18:06:25 +05:30
Benoît Monin 50558221cf platform: generic: Add Metanoia MT2824 initial support 
Add the Metanoia MT2824 as a generic platform. This SoC contains two
AX45MP cores from Andes Technology and uses Andes PMU and vendor-specific
extensions.

Originally-by: Jun Chang <jun.chang@metanoia-comm.com>
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260724-mt5824-v3-1-9a7d17d69974@bootlin.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-08-20 12:12:38 +05:30