Mirrors/opensbi
7
0
Fork 1
mirror of https://github.com/riscv-software-src/opensbi.git synced 2025-08-26 16:31:30 +01:00
Code Issues Packages Projects Releases Wiki Activity
111 Commits 3 Branches 19 Tags
00f77d9ba0465fe7baf65df487195880555db597
Commit Graph

4 Commits

Author SHA1 Message Date
Anup Patel
4d1eccc41d include: Add hard FP access macros and defines 
This patch adds hardware floating-point (hard FP) access
macros and defines.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
 2019-01-03 14:21:08 -08:00
Anup Patel
5959312a5c lib: Redirect illegal instruction trap to S-mode when not handled 
Currently, we fail with error SBI_ENOTSUPP when we are not able
to handle illegal instruction trap. Instead, we should just
redirect illegal instruction trap to S-mode when not handled.

This redirection of illegal instruction trap will help lazy
save/restore of floating point registers to work correctly in
Linux kernel.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
 2018-12-31 09:28:26 +05:30
Anup Patel
96f66f79ca lib: Move instruction encoding macros to riscv_encoding.h 
This patch moves all instruction encoding macros to
riscv_encoding.h.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
 2018-12-26 11:14:22 +05:30
Anup Patel
9e8ff05cb6 Initial commit. 
Signed-off-by: Anup Patel <anup.patel@wdc.com>
 2018-12-11 19:24:06 +05:30