Chao-ying Fu
995f226f3f
lib: Emit lr and sc instructions based on -march flags
...
When -march=rv64im_zalrsc_zicsr is used, provide atomic operations
and locks using lr and sc instructions only.
Signed-off-by: Chao-ying Fu <cfu@mips.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
Link: https://lore.kernel.org/r/20250226014727.19710-1-cfu@mips.com
Signed-off-by: Anup Patel <anup@brainfault.org >
2025-03-28 18:52:05 +05:30
Yangjie Zhang
e8114c6ae2
docs: platform: update platform_requirements.md
...
"Zicsr" isa extension has been separated from "I" extension.
This patch add the isa requirement of "Zicsr" extension in
platform requirements documentation.
Signed-off-by: Yangjie Zhang <jay1273062855@outlook.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2023-10-06 17:58:09 +05:30
zhangdongdong
3f3d401d2d
docs: Fix some typos
...
We fix few typos in documentation.
Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com >
Reviewed-by: Andrew Jones <ajones@ventanamicro.com >
Reviewed-by: Xiang W <wxjstz@126.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-13 09:28:54 +05:30
Anup Patel
dfd9dd67dc
docs: Add platform requirements document
...
We add platform requirements document to clarify OpenSBI
expectations from a RISC-V platform.
Signed-off-by: Anup Patel <anup.patel@wdc.com >
Reviewed-by: Atish Patra <atish.patra@wdc.com >
Reviewed-by: Bin Meng <bin.meng@windriver.com >
2020-05-07 09:45:52 +05:30
