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lib: sbi_misaligned_ldst: Remove mcause, scratch and hartid parameters

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We remove mcause, scratch and hartid parameters from various functions
for misaligned load/store handling because we can always get current
HART id and current scratch pointer using just one CSR access.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
Anup Patel
2020-03-19 21:30:02 +05:30
committed by Anup Patel
parent 5a7bd0c88d
commit fe37d7da29
3 changed files with 12 additions and 25 deletions
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13
include/sbi/sbi_misaligned_ldst.h
View File

@@ -13,16 +13,11 @@
#include <sbi/sbi_types.h> #include <sbi/sbi_types.h>
struct sbi_trap_regs; struct sbi_trap_regs;
struct sbi_scratch;
int sbi_misaligned_load_handler(u32 hartid, ulong mcause, int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
ulong addr, ulong tval2, ulong tinst, struct sbi_trap_regs *regs);
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch);
int sbi_misaligned_store_handler(u32 hartid, ulong mcause, int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
ulong addr, ulong tval2, ulong tinst, struct sbi_trap_regs *regs);
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch);
#endif #endif

16
lib/sbi/sbi_misaligned_ldst.c
View File

@@ -21,10 +21,8 @@ union reg_data {
u64 data_u64; u64 data_u64;
}; };
int sbi_misaligned_load_handler(u32 hartid, ulong mcause, int sbi_misaligned_load_handler(ulong addr, ulong tval2, ulong tinst,
ulong addr, ulong tval2, ulong tinst, struct sbi_trap_regs *regs)
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch)
{ {
ulong insn; ulong insn;
union reg_data val; union reg_data val;
@@ -110,7 +108,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
#endif #endif
} else { } else {
uptrap.epc = regs->mepc; uptrap.epc = regs->mepc;
uptrap.cause = mcause; uptrap.cause = CAUSE_MISALIGNED_LOAD;
uptrap.tval = addr; uptrap.tval = addr;
uptrap.tval2 = tval2; uptrap.tval2 = tval2;
uptrap.tinst = tinst; uptrap.tinst = tinst;
@@ -141,10 +139,8 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause,
return 0; return 0;
} }
int sbi_misaligned_store_handler(u32 hartid, ulong mcause, int sbi_misaligned_store_handler(ulong addr, ulong tval2, ulong tinst,
ulong addr, ulong tval2, ulong tinst, struct sbi_trap_regs *regs)
struct sbi_trap_regs *regs,
struct sbi_scratch *scratch)
{ {
ulong insn; ulong insn;
union reg_data val; union reg_data val;
@@ -221,7 +217,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause,
#endif #endif
} else { } else {
uptrap.epc = regs->mepc; uptrap.epc = regs->mepc;
uptrap.cause = mcause; uptrap.cause = CAUSE_MISALIGNED_STORE;
uptrap.tval = addr; uptrap.tval = addr;
uptrap.tval2 = tval2; uptrap.tval2 = tval2;
uptrap.tinst = tinst; uptrap.tinst = tinst;

8
lib/sbi/sbi_trap.c
View File

@@ -247,15 +247,11 @@ void sbi_trap_handler(struct sbi_trap_regs *regs,
msg = "illegal instruction handler failed"; msg = "illegal instruction handler failed";
break; break;
case CAUSE_MISALIGNED_LOAD: case CAUSE_MISALIGNED_LOAD:
rc = sbi_misaligned_load_handler(hartid, mcause, mtval, rc = sbi_misaligned_load_handler(mtval, mtval2, mtinst, regs);
mtval2, mtinst, regs,
scratch);
msg = "misaligned load handler failed"; msg = "misaligned load handler failed";
break; break;
case CAUSE_MISALIGNED_STORE: case CAUSE_MISALIGNED_STORE:
rc = sbi_misaligned_store_handler(hartid, mcause, mtval, rc = sbi_misaligned_store_handler(mtval, mtval2, mtinst, regs);
mtval2, mtinst, regs,
scratch);
msg = "misaligned store handler failed"; msg = "misaligned store handler failed";
break; break;
case CAUSE_SUPERVISOR_ECALL: case CAUSE_SUPERVISOR_ECALL: