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all: Annotate some tables to have clang-format leave them alone

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One of the shortcomings of clang-format is that it doesn't allow
for aligned define tables, which is used for a number of constants.

Add annotation to disable the automatic formatting where needed.

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2019-04-10 17:41:46 -07:00
committed by Anup Patel
parent 97fb8c0e3b
commit fbf986ac2a
18 changed files with 72 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
platform/common/serial/sifive-uart.c
View File

@@ -11,6 +11,8 @@
#include <sbi/sbi_console.h>
#include <plat/serial/sifive-uart.h>
/* clang-format off */
#define UART_REG_TXFIFO 0
#define UART_REG_RXFIFO 1
#define UART_REG_TXCTRL 2
@@ -25,6 +27,8 @@
#define UART_TXCTRL_TXEN 0x1
#define UART_RXCTRL_RXEN 0x1
/* clang-format on */
static volatile void *uart_base;
static u32 uart_in_freq;
static u32 uart_baudrate;

4
platform/common/serial/uart8250.c
View File

@@ -10,6 +10,8 @@
#include <sbi/riscv_io.h>
#include <plat/serial/uart8250.h>
/* clang-format off */
#define UART_RBR_OFFSET 0 /* In: Recieve Buffer Register */
#define UART_THR_OFFSET 0 /* Out: Transmitter Holding Register */
#define UART_DLL_OFFSET 0 /* Out: Divisor Latch Low */
@@ -34,6 +36,8 @@
#define UART_LSR_DR 0x01 /* Receiver data ready */
#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */
/* clang-format on */
static volatile void *uart8250_base;
static u32 uart8250_in_freq;
static u32 uart8250_baudrate;

5
platform/kendryte/k210/platform.h
View File

@@ -22,6 +22,8 @@
#include <sbi/riscv_asm.h>
/* clang-format off */
#define K210_HART_COUNT 2
#define K210_HART_STACK_SIZE 4096
@@ -171,5 +173,6 @@ enum plic_irq {
#define PLIC_NUM_SOURCES (IRQN_MAX - 1)
#define PLIC_NUM_PRIORITIES (7)
#endif /* _PLATFORM_H_ */
/* clang-format on */
#endif /* _PLATFORM_H_ */

4
platform/kendryte/k210/uarths.h
View File

@@ -50,6 +50,8 @@
#include <sbi/sbi_types.h>
/* clang-format off */
/* Base register address */
#define UARTHS_BASE_ADDR (0x38000000U)
@@ -74,6 +76,8 @@
#define UARTHS_IP_TXWM 0x01
#define UARTHS_IP_RXWM 0x02
/* clang-format on */
struct uarths_txdata {
/* Bits [7:0] is data */
u32 data : 8;

4
platform/qemu/sifive_u/platform.c
View File

@@ -15,6 +15,8 @@
#include <plat/serial/sifive-uart.h>
#include <plat/sys/clint.h>
/* clang-format off */
#define SIFIVE_U_HART_COUNT 1
#define SIFIVE_U_HART_STACK_SIZE 8192
@@ -30,6 +32,8 @@
#define SIFIVE_U_UART0_ADDR 0x10013000
#define SIFIVE_U_UART1_ADDR 0x10023000
/* clang-format on */
static int sifive_u_final_init(bool cold_boot)
{
void *fdt;

4
platform/qemu/virt/platform.c
View File

@@ -17,6 +17,8 @@
#include <plat/serial/uart8250.h>
#include <plat/sys/clint.h>
/* clang-format off */
#define VIRT_HART_COUNT 8
#define VIRT_HART_STACK_SIZE 8192
@@ -34,6 +36,8 @@
#define VIRT_UART_BAUDRATE 115200
#define VIRT_UART_SHIFTREG_ADDR 1843200
/* clang-format on */
static int virt_final_init(bool cold_boot)
{
void *fdt;

4
platform/sifive/fu540/platform.c
View File

@@ -19,6 +19,8 @@
#include <plat/serial/sifive-uart.h>
#include <plat/sys/clint.h>
/* clang-format off */
#define FU540_HART_COUNT 5
#define FU540_HART_STACK_SIZE 8192
@@ -50,6 +52,8 @@
#define FU540_PRCI_CLKMUXSTATUSREG 0x002C
#define FU540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1)
/* clang-format on */
static void fu540_modify_dt(void *fdt)
{
u32 i, size;