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lib: sbi: expected trap must always clear MPRV

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Expected trap must always clear MPRV. Currently it doesn't. There is a
security issue here where if firmware was doing ld/st with MPRV=1 and
since there would be a expected trap, opensbi will continue to run as
MPRV=1. Security impact is DoS where opensbi will just keep trapping.

Signed-off-by: Deepak Gupta <debug@rivosinc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20251124220339.3695940-1-debug@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Deepak Gupta
2025-11-24 14:03:39 -08:00
committed by Anup Patel
parent 73183a60ab
commit fbb5fe811d
1 changed files with 4 additions and 0 deletions
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4
lib/sbi/sbi_expected_trap.S
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@@ -23,6 +23,8 @@
.global __sbi_expected_trap .global __sbi_expected_trap
__sbi_expected_trap: __sbi_expected_trap:
/* Without H-extension so, MTVAL2 and MTINST CSRs and GVA not available */ /* Without H-extension so, MTVAL2 and MTINST CSRs and GVA not available */
li a4, MSTATUS_MPRV
csrc CSR_MSTATUS, a4
csrr a4, CSR_MCAUSE csrr a4, CSR_MCAUSE
REG_S a4, SBI_TRAP_INFO_OFFSET(cause)(a3) REG_S a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
csrr a4, CSR_MTVAL csrr a4, CSR_MTVAL
@@ -39,6 +41,8 @@ __sbi_expected_trap:
.global __sbi_expected_trap_hext .global __sbi_expected_trap_hext
__sbi_expected_trap_hext: __sbi_expected_trap_hext:
/* With H-extension so, MTVAL2 and MTINST CSRs and GVA available */ /* With H-extension so, MTVAL2 and MTINST CSRs and GVA available */
li a4, MSTATUS_MPRV
csrc CSR_MSTATUS, a4
csrr a4, CSR_MCAUSE csrr a4, CSR_MCAUSE
REG_S a4, SBI_TRAP_INFO_OFFSET(cause)(a3) REG_S a4, SBI_TRAP_INFO_OFFSET(cause)(a3)
csrr a4, CSR_MTVAL csrr a4, CSR_MTVAL