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https://github.com/riscv-software-src/opensbi.git
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lib: Fix coldboot race condition observed on emulators/simulators
If we are running on RISC-V emulator/simulator with large number of HARTs where each HART is a regular thread under UNIX host then it is possible that some of the secondary HARTs don't get chance to run and sbi_hart_wake_coldboot_harts() is called before secondary HARTs call sbi_hart_wait_for_coldboot(). In this situation, some of the secondary HARTs will never come-out of coldboot wait loop. To tackle this, we introduce a global flag coldboot_done which will be protected by coldboot lock and it will be set by primary HART from sbi_hart_wake_coldboot_harts() before waking-up secondary HARTs. We also re-arrange acquire/release of coldboot lock to reduce further chances of race-condition. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Zong Li <zong.li@sifive.com> Reviewed-by: Nylon Chen<nylon7@andestech.com>
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@@ -344,12 +344,12 @@ struct sbi_scratch *sbi_hart_id_to_scratch(struct sbi_scratch *scratch,
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}
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}
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#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
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#define COLDBOOT_WAIT_BITMAP_SIZE __riscv_xlen
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static spinlock_t coldboot_wait_bitmap_lock = SPIN_LOCK_INITIALIZER;
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static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
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static unsigned long coldboot_wait_bitmap = 0;
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static unsigned long coldboot_done = 0;
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static unsigned long coldboot_wait_bitmap = 0;
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void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
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void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
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{
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{
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unsigned long mipval;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if ((sbi_platform_hart_count(plat) <= hartid) ||
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if ((sbi_platform_hart_count(plat) <= hartid) ||
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@@ -359,19 +359,26 @@ void sbi_hart_wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
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/* Set MSIE bit to receive IPI */
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/* Set MSIE bit to receive IPI */
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csr_set(CSR_MIE, MIP_MSIP);
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csr_set(CSR_MIE, MIP_MSIP);
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do {
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/* Acquire coldboot lock */
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spin_lock(&coldboot_wait_bitmap_lock);
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spin_lock(&coldboot_lock);
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coldboot_wait_bitmap |= (1UL << hartid);
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spin_unlock(&coldboot_wait_bitmap_lock);
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/* Mark current HART as waiting */
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coldboot_wait_bitmap |= (1UL << hartid);
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/* Wait for coldboot to finish using WFI */
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while (!coldboot_done) {
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spin_unlock(&coldboot_lock);
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wfi();
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wfi();
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mipval = csr_read(CSR_MIP);
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spin_lock(&coldboot_lock);
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};
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spin_lock(&coldboot_wait_bitmap_lock);
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/* Unmark current HART as waiting */
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coldboot_wait_bitmap &= ~(1UL << hartid);
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coldboot_wait_bitmap &= ~(1UL << hartid);
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spin_unlock(&coldboot_wait_bitmap_lock);
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} while (!(mipval & MIP_MSIP));
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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/* Clear current HART IPI */
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sbi_platform_ipi_clear(plat, hartid);
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sbi_platform_ipi_clear(plat, hartid);
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}
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}
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@@ -380,11 +387,18 @@ void sbi_hart_wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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int max_hart = sbi_platform_hart_count(plat);
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int max_hart = sbi_platform_hart_count(plat);
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Mark coldboot done */
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coldboot_done = 1;
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/* Send an IPI to all HARTs waiting for coldboot */
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for (int i = 0; i < max_hart; i++) {
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for (int i = 0; i < max_hart; i++) {
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/* send an IPI to every other hart */
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spin_lock(&coldboot_wait_bitmap_lock);
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if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
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if ((i != hartid) && (coldboot_wait_bitmap & (1UL << i)))
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sbi_platform_ipi_send(plat, i);
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sbi_platform_ipi_send(plat, i);
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spin_unlock(&coldboot_wait_bitmap_lock);
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}
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}
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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}
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}
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