mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 23:41:23 +01:00
lib: utils/timer: Allow separate base addresses for MTIME and MTIMECMP
We extend the ACLINT library to support separate base addresses for MTIME and MTIMECMP registers. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
This commit is contained in:
@@ -44,8 +44,12 @@ static struct aclint_mswi_data mswi = {
|
||||
};
|
||||
|
||||
static struct aclint_mtimer_data mtimer = {
|
||||
.addr = ARIANE_ACLINT_MTIMER_ADDR,
|
||||
.size = ACLINT_MTIMER_SIZE,
|
||||
.mtime_addr = ARIANE_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET,
|
||||
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
|
||||
.mtimecmp_addr = ARIANE_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET,
|
||||
.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
|
||||
.first_hartid = 0,
|
||||
.hart_count = ARIANE_HART_COUNT,
|
||||
.has_64bit_mmio = TRUE,
|
||||
|
@@ -49,8 +49,12 @@ static struct aclint_mswi_data mswi = {
|
||||
};
|
||||
|
||||
static struct aclint_mtimer_data mtimer = {
|
||||
.addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR,
|
||||
.size = ACLINT_MTIMER_SIZE,
|
||||
.mtime_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET,
|
||||
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
|
||||
.mtimecmp_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET,
|
||||
.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
|
||||
.first_hartid = 0,
|
||||
.hart_count = OPENPITON_DEFAULT_HART_COUNT,
|
||||
.has_64bit_mmio = TRUE,
|
||||
@@ -82,7 +86,10 @@ static int openpiton_early_init(bool cold_boot)
|
||||
rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
|
||||
if (!rc) {
|
||||
mswi.addr = clint_addr;
|
||||
mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET;
|
||||
mtimer.mtime_addr = clint_addr + CLINT_MTIMER_OFFSET +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET;
|
||||
mtimer.mtimecmp_addr = clint_addr + CLINT_MTIMER_OFFSET +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@@ -42,8 +42,12 @@ static struct aclint_mswi_data mswi = {
|
||||
};
|
||||
|
||||
static struct aclint_mtimer_data mtimer = {
|
||||
.addr = K210_ACLINT_MTIMER_ADDR,
|
||||
.size = ACLINT_MTIMER_SIZE,
|
||||
.mtime_addr = K210_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET,
|
||||
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
|
||||
.mtimecmp_addr = K210_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET,
|
||||
.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
|
||||
.first_hartid = 0,
|
||||
.hart_count = K210_HART_COUNT,
|
||||
.has_64bit_mmio = TRUE,
|
||||
|
@@ -74,8 +74,12 @@ static struct aclint_mswi_data mswi = {
|
||||
};
|
||||
|
||||
static struct aclint_mtimer_data mtimer = {
|
||||
.addr = UX600_ACLINT_MTIMER_ADDR,
|
||||
.size = ACLINT_MTIMER_SIZE,
|
||||
.mtime_addr = UX600_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET,
|
||||
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
|
||||
.mtimecmp_addr = UX600_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET,
|
||||
.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
|
||||
.first_hartid = 0,
|
||||
.hart_count = UX600_HART_COUNT,
|
||||
.has_64bit_mmio = TRUE,
|
||||
|
@@ -43,8 +43,12 @@ static struct aclint_mswi_data mswi = {
|
||||
};
|
||||
|
||||
static struct aclint_mtimer_data mtimer = {
|
||||
.addr = PLATFORM_ACLINT_MTIMER_ADDR,
|
||||
.size = ACLINT_MTIMER_SIZE,
|
||||
.mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIME_OFFSET,
|
||||
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
|
||||
.mtimecmp_addr = PLATFORM_ACLINT_MTIMER_ADDR +
|
||||
ACLINT_DEFAULT_MTIMECMP_OFFSET,
|
||||
.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
|
||||
.first_hartid = 0,
|
||||
.hart_count = PLATFORM_HART_COUNT,
|
||||
.has_64bit_mmio = TRUE,
|
||||
|
Reference in New Issue
Block a user