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platform: Add support for Shakti C-class SoC from IIT-M
C-Class is a member of the SHAKTI family of processors from Indian Institute of Technology - Madras(IIT-M). It is an extremely configurable and commercial-grade 5-stage in-order core supporting the standard RV64GCSUN ISA extensions. https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md We add OpenSBI support for Shakti C-class SoC. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
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committed by
Anup Patel

parent
637b348224
commit
db56ef367c
@@ -26,6 +26,9 @@
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#define DEFAULT_SIFIVE_UART_REG_SHIFT 0
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#define DEFAULT_SIFIVE_UART_REG_IO_WIDTH 4
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#define DEFAULT_SHAKTI_UART_FREQ 50000000
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#define DEFAULT_SHAKTI_UART_BAUD 115200
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const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
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const struct fdt_match *match_table)
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{
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@@ -164,6 +167,40 @@ int fdt_parse_max_hart_id(void *fdt, u32 *max_hartid)
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return 0;
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}
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int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart)
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{
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int len, rc;
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const fdt32_t *val;
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unsigned long reg_addr, reg_size;
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if (nodeoffset < 0 || !uart || !fdt)
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return SBI_ENODEV;
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rc = fdt_get_node_addr_size(fdt, nodeoffset, ®_addr, ®_size);
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if (rc < 0 || !reg_addr || !reg_size)
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return SBI_ENODEV;
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uart->addr = reg_addr;
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/**
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* UART address is mandaotry. clock-frequency and current-speed
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* may not be present. Don't return error.
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*/
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val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "clock-frequency", &len);
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if (len > 0 && val)
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uart->freq = fdt32_to_cpu(*val);
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else
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uart->freq = DEFAULT_SHAKTI_UART_FREQ;
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val = (fdt32_t *)fdt_getprop(fdt, nodeoffset, "current-speed", &len);
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if (len > 0 && val)
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uart->baud = fdt32_to_cpu(*val);
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else
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uart->baud = DEFAULT_SHAKTI_UART_BAUD;
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return 0;
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}
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int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
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struct platform_uart_data *uart)
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{
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