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lib: utils/irqchip: Add shared MMIO region for PLIC in root domain
On platforms with Smepmp, the MMIO regions accessed by M-mode need to be explicitly marked with M-mode only read/write or shared (both (M-mode and S-mode) read/write permission. If the above is not done then runtime PLIC access from M-mode on platforms with Smepmp will result in access fault when further results in CPU hotplug not working. Signed-off-by: Anup Patel <apatel@ventanamicro.com>
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@@ -880,6 +880,7 @@ int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic)
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if (rc < 0 || !reg_addr || !reg_size)
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return SBI_ENODEV;
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plic->addr = reg_addr;
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plic->size = reg_size;
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val = fdt_getprop(fdt, nodeoffset, "riscv,ndev", &len);
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if (len > 0)
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