Makefile: Set ABI, ISA and Code Model in top-level make

This patch introduces following optional PLATFORM options:
PLATFORM_RISCV_XLEN -> RISC-V register width
PLATFORM_RISCV_ABI -> RISC-V GCC ABI
PLATFORM_RISCV_ISA -> RISC-V GCC ISA string
PLATFORM_RISCV_CODE_MODEL -> RISC-V GCC Code Model

If the above options are not provided by platform config.mk
or by command-line parameters then:
1. PLATFORM_RISCV_XLEN will be determined using toolchain
capability
2. PLATFORM_RISCV_ABI, PLATFORM_RISCV_ISA, and
PLATFORM_RISCV_CODE_MODEL is set to value best suited for
generic libsbi.a

As a result of these optional PLATFORM options, the
platform-cflags-y and platform-asflags-y is further
simplified for platform config.mk.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Anup Patel
2019-02-08 12:47:01 +05:30
committed by Anup Patel
parent 84169e2e69
commit c5467fce46
6 changed files with 46 additions and 25 deletions

View File

@@ -8,19 +8,23 @@
platform-cppflags-y =
# C Compiler and assembler flags.
# For a 64 bits platform, this will likely be:
# -mabi=lp64 -march=rv64imafdc -mcmodel=medany
# For a 32 bits platform, this will likely be:
# -mabi=lp32 -march=rv32imafdc -mcmodel=medlow
# You can also use the Makefile variable OPENSBI_CC_XLEN for the xlen
# See the QEMU virt machine for an example of this
platform-cflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
platform-asflags-y = -mabi=lp64 -march=rv64imafdc -mcmodel=medany
platform-cflags-y =
platform-asflags-y =
# Linker flags: additional libraries and object files that the platform
# code needs can be added here
platform-ldflags-y =
#
# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
# These are optional parameters but platforms can optionaly provide it.
# Some of these are guessed based on GCC compiler capabilities
#
# PLATFORM_RISCV_XLEN = 64
# PLATFORM_RISCV_ABI = lp64
# PLATFORM_RISCV_ISA = rv64imafdc
# PLATFORM_RISCV_CODE_MODEL = medany
#
# OpenSBI implements generic drivers for some common generic hardware. The
# drivers currently available are the RISC-V Platform Level Interrupt