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lib: utils/irqchip: plic: Allow enabling IRQs by default

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Unlike other platforms, Ariane and OpenPiton enable all IRQs by default.
This was described in commit b44e844880 ("Add support for Ariane FPGA
SoC") as "due to some issue of the design." Add this workaround behind a
flag in plic_warm_irqchip_init(), so every platform can use the same
warm init function.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Samuel Holland
2024-11-04 20:10:02 -08:00
committed by Anup Patel
parent 86d2c1797a
commit a786aed08d
4 changed files with 21 additions and 53 deletions
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include/sbi_utils/irqchip/plic.h
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@@ -16,8 +16,12 @@ struct plic_data {
unsigned long addr;
unsigned long size;
unsigned long num_src;
unsigned long flags;
};
/** Work around a bug on Ariane that requires enabling interrupts at boot */
#define PLIC_FLAG_ARIANE_BUG BIT(0)
/* So far, priorities on all consumers of these functions fit in 8 bits. */
void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
@@ -30,9 +34,6 @@ void plic_context_save(const struct plic_data *plic, int context_id,
void plic_context_restore(const struct plic_data *plic, int context_id,
const u32 *enable, u32 threshold, u32 num);
int plic_context_init(const struct plic_data *plic, int context_id,
bool enable, u32 threshold);
int plic_warm_irqchip_init(const struct plic_data *plic,
int m_cntx_id, int s_cntx_id);