mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-25 07:41:42 +01:00
platform: Replace CLINT library usage with ACLINT library
The ACLINT devices are backward compatible with SiFive CLINT so we replace all CLINT library usage in various platforms with ACLINT library. As a result of this replacement, the CLINT library is not used by any part of OpenSBI hence we remove it. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
@@ -12,9 +12,10 @@
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define ARIANE_UART_ADDR 0x10000000
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#define ARIANE_UART_FREQ 50000000
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@@ -25,14 +26,26 @@
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#define ARIANE_PLIC_NUM_SOURCES 3
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#define ARIANE_HART_COUNT 1
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#define ARIANE_CLINT_ADDR 0x2000000
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#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \
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CLINT_MSWI_OFFSET)
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#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \
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CLINT_MTIMER_OFFSET)
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static struct plic_data plic = {
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.addr = ARIANE_PLIC_ADDR,
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.num_src = ARIANE_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = ARIANE_CLINT_ADDR,
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static struct aclint_mswi_data mswi = {
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.addr = ARIANE_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = ARIANE_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = ARIANE_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.hart_count = ARIANE_HART_COUNT,
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.has_64bit_mmio = TRUE,
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@@ -123,12 +136,12 @@ static int ariane_ipi_init(bool cold_boot)
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int ret;
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if (cold_boot) {
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ret = clint_cold_ipi_init(&clint);
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ret = aclint_mswi_cold_init(&mswi);
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if (ret)
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return ret;
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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/*
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@@ -139,12 +152,12 @@ static int ariane_timer_init(bool cold_boot)
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int ret;
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if (cold_boot) {
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ret = clint_cold_timer_init(&clint, NULL);
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ret = aclint_mtimer_cold_init(&mtimer, NULL);
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if (ret)
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return ret;
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}
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return clint_warm_timer_init();
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return aclint_mtimer_warm_init();
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}
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/*
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@@ -12,9 +12,10 @@
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define OPENPITON_DEFAULT_UART_ADDR 0xfff0c2c000
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#define OPENPITON_DEFAULT_UART_FREQ 60000000
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@@ -25,6 +26,10 @@
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#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
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#define OPENPITON_DEFAULT_HART_COUNT 3
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#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
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#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \
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(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
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#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR \
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(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MTIMER_OFFSET)
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static struct platform_uart_data uart = {
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OPENPITON_DEFAULT_UART_ADDR,
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@@ -36,8 +41,16 @@ static struct plic_data plic = {
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.num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = OPENPITON_DEFAULT_CLINT_ADDR,
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static struct aclint_mswi_data mswi = {
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.addr = OPENPITON_DEFAULT_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = OPENPITON_DEFAULT_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.hart_count = OPENPITON_DEFAULT_HART_COUNT,
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.has_64bit_mmio = TRUE,
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@@ -67,8 +80,10 @@ static int openpiton_early_init(bool cold_boot)
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plic = plic_data;
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rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
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if (!rc)
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clint.addr = clint_addr;
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if (!rc) {
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mswi.addr = clint_addr;
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mtimer.addr = clint_addr + CLINT_MTIMER_OFFSET;
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}
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return 0;
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}
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@@ -149,12 +164,12 @@ static int openpiton_ipi_init(bool cold_boot)
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int ret;
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if (cold_boot) {
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ret = clint_cold_ipi_init(&clint);
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ret = aclint_mswi_cold_init(&mswi);
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if (ret)
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return ret;
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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/*
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@@ -165,12 +180,12 @@ static int openpiton_timer_init(bool cold_boot)
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int ret;
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if (cold_boot) {
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ret = clint_cold_timer_init(&clint, NULL);
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ret = aclint_mtimer_cold_init(&mtimer, NULL);
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if (ret)
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return ret;
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}
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return clint_warm_timer_init();
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return aclint_mtimer_warm_init();
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}
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/*
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@@ -14,9 +14,10 @@
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/sifive-uart.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#include "platform.h"
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extern const char dt_k210_start[];
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@@ -33,8 +34,16 @@ static struct plic_data plic = {
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.num_src = K210_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = K210_CLINT_BASE_ADDR,
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static struct aclint_mswi_data mswi = {
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.addr = K210_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = K210_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = K210_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.hart_count = K210_HART_COUNT,
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.has_64bit_mmio = TRUE,
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@@ -139,12 +148,12 @@ static int k210_ipi_init(bool cold_boot)
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int rc;
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if (cold_boot) {
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rc = clint_cold_ipi_init(&clint);
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rc = aclint_mswi_cold_init(&mswi);
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if (rc)
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return rc;
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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static int k210_timer_init(bool cold_boot)
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@@ -152,12 +161,12 @@ static int k210_timer_init(bool cold_boot)
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int rc;
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if (cold_boot) {
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rc = clint_cold_timer_init(&clint, NULL);
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rc = aclint_mtimer_cold_init(&mtimer, NULL);
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if (rc)
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return rc;
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}
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return clint_warm_timer_init();
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return aclint_mtimer_warm_init();
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}
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const struct sbi_platform_operations platform_ops = {
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@@ -22,6 +22,10 @@
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#define K210_SYSCTL_BASE_ADDR 0x50440000ULL
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#define K210_UART_BASE_ADDR 0x38000000ULL
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#define K210_CLINT_BASE_ADDR 0x02000000ULL
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#define K210_ACLINT_MSWI_ADDR \
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(K210_CLINT_BASE_ADDR + CLINT_MSWI_OFFSET)
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#define K210_ACLINT_MTIMER_ADDR \
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(K210_CLINT_BASE_ADDR + CLINT_MTIMER_OFFSET)
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#define K210_PLIC_BASE_ADDR 0x0C000000ULL
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/* Registers */
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@@ -17,9 +17,10 @@
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/sifive-uart.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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/* clang-format off */
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@@ -32,6 +33,10 @@
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#define UX600_NUCLEI_TIMER_MSFTRST_KEY 0x80000A5F
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/* The clint compatiable timer offset is 0x1000 against nuclei timer */
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#define UX600_CLINT_TIMER_ADDR (UX600_NUCLEI_TIMER_ADDR + 0x1000)
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#define UX600_ACLINT_MSWI_ADDR (UX600_CLINT_TIMER_ADDR + \
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CLINT_MSWI_OFFSET)
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#define UX600_ACLINT_MTIMER_ADDR (UX600_CLINT_TIMER_ADDR + \
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CLINT_MTIMER_OFFSET)
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#define UX600_PLIC_ADDR 0x8000000
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#define UX600_PLIC_NUM_SOURCES 0x35
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@@ -61,12 +66,21 @@ static struct plic_data plic = {
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.num_src = UX600_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = UX600_CLINT_TIMER_ADDR,
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static struct aclint_mswi_data mswi = {
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.addr = UX600_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = UX600_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = UX600_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.hart_count = UX600_HART_COUNT,
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.has_64bit_mmio = TRUE,
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};
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static u32 measure_cpu_freq(u32 n)
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{
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u32 start_mtime, delta_mtime;
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@@ -188,12 +202,12 @@ static int ux600_ipi_init(bool cold_boot)
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int rc;
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if (cold_boot) {
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rc = clint_cold_ipi_init(&clint);
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rc = aclint_mswi_cold_init(&mswi);
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if (rc)
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return rc;
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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static int ux600_timer_init(bool cold_boot)
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@@ -201,12 +215,12 @@ static int ux600_timer_init(bool cold_boot)
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int rc;
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if (cold_boot) {
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rc = clint_cold_timer_init(&clint, NULL);
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rc = aclint_mtimer_cold_init(&mtimer, NULL);
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if (rc)
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return rc;
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}
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return clint_warm_timer_init();
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return aclint_mtimer_warm_init();
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}
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const struct sbi_platform_operations platform_ops = {
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@@ -13,14 +13,19 @@
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* Include these files as needed.
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* See config.mk PLATFORM_xxx configuration parameters.
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*/
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/uart8250.h>
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#include <sbi_utils/sys/clint.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define PLATFORM_PLIC_ADDR 0xc000000
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#define PLATFORM_PLIC_NUM_SOURCES 128
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#define PLATFORM_HART_COUNT 4
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#define PLATFORM_CLINT_ADDR 0x2000000
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#define PLATFORM_ACLINT_MSWI_ADDR (PLATFORM_CLINT_ADDR + \
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CLINT_MSWI_OFFSET)
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#define PLATFORM_ACLINT_MTIMER_ADDR (PLATFORM_CLINT_ADDR + \
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CLINT_MTIMER_OFFSET)
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#define PLATFORM_UART_ADDR 0x09000000
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#define PLATFORM_UART_INPUT_FREQ 10000000
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#define PLATFORM_UART_BAUDRATE 115200
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@@ -30,8 +35,16 @@ static struct plic_data plic = {
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.num_src = PLATFORM_PLIC_NUM_SOURCES,
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};
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static struct clint_data clint = {
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.addr = PLATFORM_CLINT_ADDR,
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static struct aclint_mswi_data mswi = {
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.addr = PLATFORM_ACLINT_MSWI_ADDR,
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.size = ACLINT_MSWI_SIZE,
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.first_hartid = 0,
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.hart_count = PLATFORM_HART_COUNT,
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};
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static struct aclint_mtimer_data mtimer = {
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.addr = PLATFORM_ACLINT_MTIMER_ADDR,
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.size = ACLINT_MTIMER_SIZE,
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.first_hartid = 0,
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.hart_count = PLATFORM_HART_COUNT,
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.has_64bit_mmio = TRUE,
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@@ -88,14 +101,14 @@ static int platform_ipi_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic CLINT driver is used */
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/* Example if the generic ACLINT driver is used */
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if (cold_boot) {
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ret = clint_cold_ipi_init(&clint);
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ret = aclint_mswi_cold_init(&mswi);
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if (ret)
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return ret;
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}
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return clint_warm_ipi_init();
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return aclint_mswi_warm_init();
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}
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/*
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@@ -105,14 +118,14 @@ static int platform_timer_init(bool cold_boot)
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{
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int ret;
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/* Example if the generic CLINT driver is used */
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/* Example if the generic ACLINT driver is used */
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if (cold_boot) {
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ret = clint_cold_timer_init(&clint, NULL);
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ret = aclint_mtimer_cold_init(&mtimer, NULL);
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if (ret)
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return ret;
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}
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return clint_warm_timer_init();
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return aclint_mtimer_warm_init();
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}
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/*
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Block a user