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https://github.com/riscv-software-src/opensbi.git
synced 2025-08-25 07:41:42 +01:00
Fix plic warm init in platform code.
Pass S-Mode and M-mode context id separately to common warm init. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com>
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@@ -28,7 +28,13 @@
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static int virt_cold_final_init(void)
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{
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return plic_fdt_fixup(sbi_scratch_thishart_arg1_ptr(), "riscv,plic0");
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u32 i;
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void *fdt = sbi_scratch_thishart_arg1_ptr();
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for (i = 0; i < PLAT_HART_COUNT; i++)
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plic_fdt_fixup(fdt, "riscv,plic0", 2 * i);
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return 0;
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}
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static u32 virt_pmp_region_count(u32 target_hart)
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@@ -69,6 +75,13 @@ static int virt_cold_irqchip_init(void)
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PLAT_HART_COUNT);
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}
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static int virt_warm_irqchip_init(u32 target_hart)
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{
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return plic_warm_irqchip_init(target_hart,
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(2 * target_hart),
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(2 * target_hart + 1));
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}
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static int virt_cold_ipi_init(void)
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{
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return clint_cold_ipi_init(VIRT_CLINT_ADDR,
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@@ -99,7 +112,7 @@ struct sbi_platform platform = {
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.console_getc = uart8250_getc,
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.console_init = virt_console_init,
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.cold_irqchip_init = virt_cold_irqchip_init,
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.warm_irqchip_init = plic_warm_irqchip_init,
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.warm_irqchip_init = virt_warm_irqchip_init,
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.ipi_inject = clint_ipi_inject,
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.ipi_sync = clint_ipi_sync,
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.ipi_clear = clint_ipi_clear,
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