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lib: utils/hsm: factor out ATCSMU code into an HSM driver

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Refactor ATCSMU (System Management Unit) support by moving it from a
system utility into a dedicated FDT-based HSM driver.

Key changes include:

- Moving the functions in lib/utils/sys/atcsmu.c into the new HSM driver
- Moving hart start and stop operations on AE350 platform into the new
  HSM driver
- Converting the assembly-based functions in sleep.S to C code for the
  readability
- Updating the ATCWDT200 driver

Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Link: https://lore.kernel.org/r/20251229071914.1451587-2-ben717@andestech.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Ben Zong-You Xie
2025-12-29 15:19:10 +08:00
committed by Anup Patel
parent 74434f2558
commit 9ffacc8ae1
16 changed files with 302 additions and 348 deletions
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59
include/sbi_utils/sys/atcsmu.h
View File

@@ -1,59 +0,0 @@
/*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2023 Andes Technology Corporation
*/
#ifndef _SYS_ATCSMU_H
#define _SYS_ATCSMU_H
#include <sbi/sbi_types.h>
/* clang-format off */
#define PCS0_WE_OFFSET 0x90
#define PCSm_WE_OFFSET(i) ((i + 3) * 0x20 + PCS0_WE_OFFSET)
#define PCS0_CTL_OFFSET 0x94
#define PCSm_CTL_OFFSET(i) ((i + 3) * 0x20 + PCS0_CTL_OFFSET)
#define PCS_CTL_CMD_SHIFT 0
#define PCS_CTL_PARAM_SHIFT 3
#define SLEEP_CMD 0x3
#define WAKEUP_CMD (0x0 | (1 << PCS_CTL_PARAM_SHIFT))
#define LIGHTSLEEP_MODE 0
#define DEEPSLEEP_MODE 1
#define LIGHT_SLEEP_CMD (SLEEP_CMD | (LIGHTSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
#define DEEP_SLEEP_CMD (SLEEP_CMD | (DEEPSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
#define PCS0_CFG_OFFSET 0x80
#define PCSm_CFG_OFFSET(i) ((i + 3) * 0x20 + PCS0_CFG_OFFSET)
#define PCS_CFG_LIGHT_SLEEP_SHIFT 2
#define PCS_CFG_LIGHT_SLEEP (1 << PCS_CFG_LIGHT_SLEEP_SHIFT)
#define PCS_CFG_DEEP_SLEEP_SHIFT 3
#define PCS_CFG_DEEP_SLEEP (1 << PCS_CFG_DEEP_SLEEP_SHIFT)
#define RESET_VEC_LO_OFFSET 0x50
#define RESET_VEC_HI_OFFSET 0x60
#define RESET_VEC_8CORE_OFFSET 0x1a0
#define HARTn_RESET_VEC_LO(n) (RESET_VEC_LO_OFFSET + \
((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
((n) * 0x4))
#define HARTn_RESET_VEC_HI(n) (RESET_VEC_HI_OFFSET + \
((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
((n) * 0x4))
#define PCS_MAX_NR 8
#define FLASH_BASE 0x80000000ULL
/* clang-format on */
struct smu_data {
unsigned long addr;
};
int smu_set_wakeup_events(struct smu_data *smu, u32 events, u32 hartid);
bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode, u32 hartid);
int smu_set_command(struct smu_data *smu, u32 pcs_ctl, u32 hartid);
int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr, u32 hartid);
#endif /* _SYS_ATCSMU_H */