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lib: sbi: Drop fw_rw_offset alignment requirement for single fw region
In a single fw region scheme, there is no separate PMP created for RW memory. The checks that opensbi does for the alignment between fw_start and fw_rw_start (using fw_rw_offset) and the power of 2 check for fw_rw_offset are no longer necessary. Update sbi_domain_init so that these checks are only done in the non single fw region scheme. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Co-developed-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com> Signed-off-by: Anirudh Srinivasan <asrinivasan@oss.tenstorrent.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260522-fw_rw_start_alignment-v1-1-362c17331541@oss.tenstorrent.com Signed-off-by: Anup Patel <anup@brainfault.org>
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committed by
Anup Patel
parent
3d29f380a6
commit
9c9767504d
@@ -874,21 +874,24 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
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struct sbi_hartmask *root_hmask;
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struct sbi_hartmask *root_hmask;
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struct sbi_domain_memregion *root_memregs;
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struct sbi_domain_memregion *root_memregs;
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int root_memregs_count = 0;
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int root_memregs_count = 0;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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bool fw_single_region = sbi_platform_single_fw_region(plat);
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SBI_INIT_LIST_HEAD(&domain_list);
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SBI_INIT_LIST_HEAD(&domain_list);
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if (!fw_single_region) {
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if (scratch->fw_rw_offset == 0 ||
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if (scratch->fw_rw_offset == 0 ||
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(scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
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(scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
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sbi_printf("%s: fw_rw_offset is not a power of 2 (0x%lx)\n",
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sbi_printf("%s: fw_rw_offset is not a power of 2 (0x%lx)\n",
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__func__, scratch->fw_rw_offset);
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__func__, scratch->fw_rw_offset);
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return SBI_EINVAL;
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return SBI_EINVAL;
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}
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}
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if ((scratch->fw_start & (scratch->fw_rw_offset - 1)) != 0) {
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if ((scratch->fw_start & (scratch->fw_rw_offset - 1)) != 0) {
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sbi_printf("%s: fw_start and fw_rw_offset not aligned\n",
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sbi_printf("%s: fw_start and fw_rw_offset not aligned\n",
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__func__);
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__func__);
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return SBI_EINVAL;
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return SBI_EINVAL;
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}
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}
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}
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domain_hart_ptr_offset = sbi_scratch_alloc_type_offset(void *);
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domain_hart_ptr_offset = sbi_scratch_alloc_type_offset(void *);
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if (!domain_hart_ptr_offset)
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if (!domain_hart_ptr_offset)
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@@ -916,7 +919,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
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root.possible_harts = root_hmask;
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root.possible_harts = root_hmask;
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/* Root domain firmware memory region */
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/* Root domain firmware memory region */
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if (sbi_platform_single_fw_region(sbi_platform_ptr(scratch))) {
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if (fw_single_region) {
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sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size,
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sbi_domain_memregion_init(scratch->fw_start, scratch->fw_size,
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(SBI_DOMAIN_MEMREGION_M_READABLE |
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(SBI_DOMAIN_MEMREGION_M_READABLE |
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SBI_DOMAIN_MEMREGION_M_WRITABLE |
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SBI_DOMAIN_MEMREGION_M_WRITABLE |
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