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lib: Emit lr and sc instructions based on -march flags
When -march=rv64im_zalrsc_zicsr is used, provide atomic operations and locks using lr and sc instructions only. Signed-off-by: Chao-ying Fu <cfu@mips.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20250226014727.19710-1-cfu@mips.com Signed-off-by: Anup Patel <anup@brainfault.org>
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@@ -53,7 +53,16 @@ void spin_lock(spinlock_t *lock)
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__asm__ __volatile__(
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/* Atomically increment the next ticket. */
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#ifdef __riscv_atomic
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" amoadd.w.aqrl %0, %4, %3\n"
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#elif __riscv_zalrsc
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"3: lr.w.aqrl %0, %3\n"
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" addw %1, %0, %4\n"
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" sc.w.aqrl %1, %1, %3\n"
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" bnez %1, 3b\n"
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#else
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#error "need a or zalrsc"
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#endif
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/* Did we get the lock? */
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" srli %1, %0, %6\n"
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