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doc: coreboot: Fix doc styles
- put all URLs at the end of the doc - satisfy the 80 character per line rule as much as possible Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
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docs/external/coreboot.md
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docs/external/coreboot.md
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OpenSBI as coreboot payload
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OpenSBI as coreboot payload
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==============================
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===========================
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[coreboot](https://www.coreboot.org/) is a free/libre and open source firmware platform support multiple hardware architectures( x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and diverse hardware models. In RISC-V world, coreboot currently support HiFive Unleashed with OpenSBI as a payload to boot GNU/Linux:
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[coreboot] is a free/libre and open source firmware platform support multiple
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hardware architectures(x86, ARMv7, arm64, PowerPC64, MIPS and RISC-V) and
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diverse hardware models. In RISC-V world, coreboot currently support HiFive
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Unleashed with OpenSBI as a payload to boot GNU/Linux:
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```
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```
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SiFive HiFive unleashed's original firmware boot process:
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SiFive HiFive unleashed's original firmware boot process:
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@@ -21,4 +24,9 @@ coreboot boot process:
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+---------------------------------------------+-------------+-------+-+
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+---------------------------------------------+-------------+-------+-+
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```
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```
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The upstreaming work is still in progress. There's a [documentation](https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md) about how to build [out-of-tree code](https://github.com/hardenedlinux/coreboot-HiFiveUnleashed) to load OpenSBI.
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The upstreaming work is still in progress. There's a [documentation] about how
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to build [out-of-tree code] to load OpenSBI.
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[coreboot]: https://www.coreboot.org/
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[documentation]: https://github.com/hardenedlinux/embedded-iot_profile/blob/master/docs/riscv/hifiveunleashed_coreboot_notes-en.md
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[out-of-tree code]: https://github.com/hardenedlinux/coreboot-HiFiveUnleashed
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